Datasheet

 2010 Microchip Technology Inc. DS39616D-page 161
PIC18F2331/2431/4331/4431
17.2 Quadrature Encoder Interface
The Quadrature Encoder Interface (QEI) decodes
speed and motion sensor information. It can be used in
any application that uses a quadrature encoder for
feedback. The interface implements these features:
• Three QEI inputs: two phase signals (QEA and
QEB) and one index signal (INDX)
• Direction of movement detection with a direction
change interrupt (IC3DRIF)
• 16-bit up/down position counter
• Standard and High-Precision Position Tracking
modes
• Two Position Update modes (x2 and x4)
• Velocity measurement with a programmable
postscaler for high-speed velocity measurement
• Position counter interrupt (IC2QEIF in the PIR3
register)
• Velocity control interrupt (IC1IF in the PIR3
register)
The QEI submodule has three main components: the
QEI control logic block, the position counter and
velocity postscaler.
The QEI control logic detects the leading edge on the
QEA or QEB phase input pins and generates the count
pulse, which is sent to the position counter logic. It also
samples the index input signal (INDX) and generates
the direction of the rotation signal (up/down) and the
velocity event signals.
The position counter acts as an integrator for tracking
distance traveled. The QEA and QEB input edges
serve as the stimulus to create the input clock which
advances the Position Counter register (POSCNT).
The register is incremented on either the QEA input
edge, or the QEA and QEB input edges, depending on
the operating mode. It is reset either by a rollover on
match to the Period register, MAXCNT, or on the
external index pulse input signal (INDX). An interrupt is
generated on a Reset of POSCNT if the position
counter interrupt is enabled.
The velocity postscaler down samples the velocity
pulses used to increment the velocity counter by a
specified ratio. It essentially divides down the number
of velocity pulses to one output per so many inputs,
preserving the pulse width in the process.
A simplified block-diagram of the QEI module is shown
in Figure 17-8.
FIGURE 17-8: QEI BLOCK DIAGRAM
Comparator
CAP2/QEA
CAP1/INDX
CAP3/QEB
CAP2BUF/POSCNT
QEI Module
QEI
Control
Logic
Filter
Filter
Filter
QEB
QEA
INDX
Timer Reset
Velocity Event
Postscaler
8
CAP3BUF/MAXCNT
8
8
Clock
Direction
8
8
Data Bus
Position Counter
Direction Change
Set CHGIF
Reset Timer5
Velocity Capture
Set UP/DOWN
Reset on Match
Set IC2QEIF