Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 146  2010 Microchip Technology Inc.
16.3 Capture Mode
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event
occurs on pin RC2/CCP1. An event is defined as
one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by control bits, CCP1M<3:0>
(CCP1CON<3:0>). When a capture is made, the
interrupt request flag bit, CCP1IF (PIR1<2>), is set; it
must be cleared in software. If another capture occurs
before the value in register CCPR1 is read, the old
captured value is overwritten by the new captured value.
16.3.1 CCP PIN CONFIGURATION
In Capture mode, the RC2/CCP1 pin should be
configured as an input by setting the TRISC<2> bit.
16.3.2 TIMER1 MODE SELECTION
Timer1 must be running in Timer mode or Synchro-
nized Counter mode to be used with the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
16.3.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit,
CCP1IE (PIE1<2>), clear to avoid false interrupts and
should clear the flag bit, CCP1IF, following any such
change in operating mode.
16.3.4 CCP PRESCALER
There are four prescaler settings specified by bits
CCP1M<3:0>. Whenever the CCP module is turned off,
or the CCP module is not in Capture mode, the
prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 16-1 shows the recom-
mended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 16-1: CHANGING BETWEEN
CAPTURE PRESCALERS
FIGURE 16-1: CAPTURE MODE OPERATION BLOCK DIAGRAM
Note: If the RC2/CCP1 pin is configured as an
output, a write to the port can cause a
capture condition.
CLRF CCP1CON ; Turn CCP module off
MOVLW NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and CCP ON
MOVWF CCP1CON ; Load CCP1CON with
; this value
CCPR1H CCPR1L
TMR1H TMR1L
Set CCP1IF Flag bit
Qs
CCP1CON<3:0>
CCP1 Pin
Prescaler
 1, 4, 16
and
Edge Detect
TMR1
Enable
CCPR2H CCPR2L
TMR1H TMR1L
Set CCP2IF Flag bit
Qs
CCP2CON<3:0>
CCP2 Pin
Prescaler
 1, 4, 16
TMR1
Enable
and
Edge Detect