Datasheet

 2010 Microchip Technology Inc. DS39616D-page 107
PIC18F2331/2431/4331/4431
REGISTER 10-9: PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — PTIE IC3DRIE IC2QEIE IC1IE TMR5IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4 PTIE: PWM Time Base Interrupt Enable bit
1 = PTIF enabled
0 = PTIF disabled
bit 3 IC3DRIE: IC3 Interrupt Enable/Direction Change Interrupt Enable bit
IC3 Enabled (CAP3CON<3:0>):
1 = IC3 interrupt enabled
0 = IC3 interrupt disabled
QEI Enabled (QEIM<2:0>):
1 = Change of direction interrupt enabled
0 = Change of direction interrupt disabled
bit 2 IC2QEIE: IC2 Interrupt Flag/QEI Interrupt Flag Enable bit
IC2 Enabled (CAP2CON<3:0>):
1 = IC2 interrupt enabled)
0 = IC2 interrupt disabled
QEI Enabled (QEIM<2:0>):
1 = QEI interrupt enabled
0 = QEI interrupt disabled
bit 1 IC1IE: IC1 Interrupt Enable bit
1 = IC1 interrupt enabled
0 = IC1 interrupt disabled
bit 0 TMR5IE: Timer5 Interrupt Enable bit
1 = Timer5 interrupt enabled
0 = Timer5 interrupt disabled