Datasheet

PIC18F2XXX/4XXX FAMILY
DS39622L-page 8  2010 Microchip Technology Inc.
For PIC18F2480/4480 devices, the code memory
space extends from 0000h to 03FFFh (16 Kbytes) in
one 16-Kbyte block. For PIC18F2580/4580 devices,
the code memory space extends from 0000h to
07FFFh (32 Kbytes) in two 16-Kbyte blocks.
Addresses, 0000h through 07FFh, however, define a
“Boot Block” region that is treated separately from
Block 0. All of these blocks define code protection
boundaries within the code memory space.
The size of the Boot Block in PIC18F2480/2580/4480/
4580 devices can be configured as 1 or 2K words (see
Figure 2-7). This is done through the BBSIZ<0> bit in
the Configuration register, CONFIG4L. It is important to
note that increasing the size of the Boot Block
decreases the size of Block 0.
TABLE 2-6: IMPLEMENTATION OF CODE
MEMORY
FIGURE 2-7: MEMORY MAP AND THE CODE MEMORY SPACE 
FOR PIC18F2480/2580/4480/4580 DEVICES
Device Code Memory Size (Bytes)
PIC18F2480
000000h-003FFFh (16K)
PIC18F4480
PIC18F2580
000000h-007FFFh (32K)
PIC18F4580
000000h
200000h
3FFFFFh
01FFFFh
Note: Sizes of memory areas are not to scale.
* Boot Block size is determined by the BBSIZ<0> bit in the CONFIG4L register.
Code Memory
Unimplemented
Read as ‘0’
Configuration
and ID
Space
MEMORY SIZE/DEVICE
Address
Range
32 Kbytes
(PIC18FX580)
16 Kbytes
(PIC18FX480)
BBSIZ<0>
10 1 0
Boot Block*
Boot Block*
Boot Block*
Boot Block*
000000h
0007FFh
Block 0
Block 0
000800h
000FFFh
Block 0
Block 0
001000h
001FFFh
Block 1
002000h
003FFFh
Block 2
004000h
Unimplemented
Reads all ‘0’s
01FFFFh
Unimplemented
Reads all ‘0’s
Block 3
005FFFh
006000h
007FFFh