Datasheet

PIC18F2XXX/4XXX FAMILY
DS39622L-page 36 2010 Microchip Technology Inc.
EBTR5 CONFIG7L Table Read Protection bit (Block 5 code memory area)
(PIC18F2685 and PIC18F4685 devices only)
1 = Block 5 is not protected from Table Reads executed in other blocks
0 = Block 5 is protected from Table Reads executed in other blocks
EBTR4 CONFIG7L Table Read Protection bit (Block 4 code memory area)
(PIC18F2682/2685 and PIC18F4682/4685 devices only)
1 = Block 4 is not protected from Table Reads executed in other blocks
0 = Block 4 is protected from Table Reads executed in other blocks
EBTR3 CONFIG7L Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from Table Reads executed in other blocks
0 = Block 3 is protected from Table Reads executed in other blocks
EBTR2 CONFIG7L Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from Table Reads executed in other blocks
0 = Block 2 is protected from Table Reads executed in other blocks
EBTR1 CONFIG7L Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from Table Reads executed in other blocks
0 = Block 1 is protected from Table Reads executed in other blocks
EBTR0 CONFIG7L Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from Table Reads executed in other blocks
0 = Block 0 is protected from Table Reads executed in other blocks
EBTRB CONFIG7H Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from Table Reads executed in other blocks
0 = Boot Block is protected from Table Reads executed in other blocks
DEV<10:3> DEVID2 Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to identify
part number.
DEV<2:0> DEVID1 Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to identify
part number.
REV<4:0> DEVID1 Revision ID bits
These bits are used to indicate the revision of the device. The REV4 bit is
sometimes used to fully specify the device type.
TABLE 5-3: PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
Note 1: The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
2: Not available in PIC18FXX8X and PIC18F2450/4450 devices.