Datasheet

 2010 Microchip Technology Inc. DS39622L-page 23
PIC18F2XXX/4XXX FAMILY
3.5 Boot Block Programming
The code sequence detailed in Table 3-5 should be
used, except that the address used in “Step 2” will be in
the range of 000000h to 0007FFh.
3.6 Configuration Bits Programming
Unlike code memory, the Configuration bits are
programmed a byte at a time. The Table Write, Begin
Programming 4-bit command (‘1111’) is used, but only
8 bits of the following 16-bit payload will be written. The
LSB of the payload will be written to even addresses and
the MSB will be written to odd addresses. The code
sequence to program two consecutive configuration
locations is shown in Table 3-9.
TABLE 3-9: SET ADDRESS POINTER TO CONFIGURATION LOCATION
FIGURE 3-8: CONFIGURATION PROGRAMMING FLOW
Note: The address must be explicitly written for
each byte programmed. The addresses
can not be incremented in this mode.
4-Bit
Command
Data Payload Core Instruction
Step 1: Enable writes and direct access to configuration memory.
0000
0000
8E A6
8C A6
BSF EECON1, EEPGD
BSF EECON1, CFGS
Step 2: Set Table Pointer for configuration byte to be written. Write even/odd addresses.
(1)
0000
0000
0000
0000
0000
0000
1111
0000
0000
0000
1111
0000
0E 30
6E F8
0E 00
6E F7
0E 00
6E F6
<MSB ignored><LSB>
00 00
0E 01
6E F6
<MSB><LSB ignored>
00 00
MOVLW 30h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPRTH
MOVLW 00h
MOVWF TBLPTRL
Load 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
MOVLW 01h
MOVWF TBLPTRL
Load 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
Note 1: Enabling the write protection of Configuration bits (WRTC = 0 in CONFIG6H) will prevent further writing of the
Configuration bits. Always write all the Configuration bits before enabling the write protection for Configuration bits.
Load Even
Configuration
Start
Program Program
MSB
Delay P9 and P10
Time for Write
LSB
Load Odd
Configuration
Address
Address
Done
Start
Delay P9 and P10
Time for Write
Done