Datasheet

PIC18F2XXX/4XXX FAMILY
DS39622L-page 16 2010 Microchip Technology Inc.
TABLE 3-3: ERASE CODE MEMORY CODE SEQUENCE
FIGURE 3-3: SINGLE ROW ERASE CODE MEMORY FLOW
4-Bit
Command
Data Payload Core Instruction
Step 1: Direct access to code memory and enable writes.
0000
0000
0000
8E A6
9C A6
84 A6
BSF EECON1, EEPGD
BCF EECON1, CFGS
BSF EECON1, WREN
Step 2: Point to first row in code memory.
0000
0000
0000
6A F8
6A F7
6A F6
CLRF TBLPTRU
CLRF TBLPTRH
CLRF TBLPTRL
Step 3: Enable erase and erase single row.
0000
0000
0000
88 A6
82 A6
00 00
BSF EECON1, FREE
BSF EECON1, WR
NOP – hold PGC high for time P9 and low for time P10.
Step 4: Repeat Step 3, with the Address Pointer incremented by 64 until all rows are erased.
Done
Start
Hold PGC Low
for Time P10
All
rows
done?
No
Yes
Addr = 0
Configure
Device for
Row Erases
Addr = Addr + 64
Start Erase Sequence
and Hold PGC High
for Time P9