Datasheet
2010 Microchip Technology Inc. DS39622L-page 15
PIC18F2XXX/4XXX FAMILY
3.1.2 LOW-VOLTAGE ICSP BULK ERASE
When using low-voltage ICSP, the part must be
supplied by the voltage specified in Parameter D111 if
a Bulk Erase is to be executed. All other Bulk Erase
details, as described above, apply.
If it is determined that a program memory erase must
be performed at a supply voltage below the Bulk Erase
limit, refer to the erase methodology described in
Section 3.1.3 “ICSP Row Erase” and Section 3.2.1
“Modifying Code Memory”.
If it is determined that a data EEPROM erase
(selected devices only, see Section 3.3 “Data
EEPROM Programming”) must be performed at a
supply voltage below the Bulk Erase limit, follow the
methodology described in Section 3.3 “Data
EEPROM Programming” and write ‘1’s to the array.
FIGURE 3-2: BULK ERASE TIMING
3.1.3 ICSP ROW ERASE
Regardless of whether high or low-voltage ICSP is used,
it is possible to erase one row (64 bytes of data), provided
the block is not code or write-protected. Rows are located
at static boundaries, beginning at program memory
address, 000000h, extending to the internal program
memory limit (see Section 2.3 “Memory Maps”).
The Row Erase duration is externally timed and is
controlled by PGC. After the WR bit in EECON1 is set,
a NOP is issued, where the 4th PGC is held high for the
duration of the programming time, P9.
After PGC is brought low, the programming sequence
is terminated. PGC must be held low for the time
specified by Parameter P10 to allow high-voltage
discharge of the memory array.
The code sequence to Row Erase a PIC18F2XXX/
4XXX family device is shown in Table 3-3. The
flowchart, shown in Figure 3-3, depicts the logic
necessary to completely erase a PIC18F2XXX/4XXX
family device. The timing diagram that details the Start
Programming command and Parameters P9 and P10
is shown in Figure 3-5.
n
1234
1
21516
123
PGC
P5
P5A
PGD
PGD = Input
0
0011
P11
P10
Erase Time
0000
00
12
00
4
0
1 2 15 16
P5
123
P5A
4
0000
n
4-Bit Command
4-Bit Command 4-Bit Command
16-Bit
Data Payload
16-Bit
Data Payload
16-Bit
Data Payload
11
Note: The TBLPTR register can point to any
byte within the row intended for erase.