Datasheet
2010 Microchip Technology Inc. Preliminary DS39964B-page 97
PIC18F47J53 FAMILY
F7Fh SPBRGH1 EUSART1 Baud Rate Generator High Byte 0000 0000
F7Eh BAUDCON1 ABDOVF RCIDL RXDTP TXCKP BRG16
— WUE ABDEN 0100 0-00
F7Dh SPBRGH2 EUSART2 Baud Rate Generator High Byte 0000 0000
F7Ch BAUDCON2 ABDOVF RCIDL RXDTP TXCKP BRG16
— WUE ABDEN 0100 0-00
F7Bh TMR3H Timer3 Register High Byte xxxx xxxx
F7Ah TMR3L Timer3 Register Low Byte xxxx xxxx
F79h T3CON TMR3CS1 TMR3CS0 T3CKPS1 T3CKPS0 T3OSCEN T3SYNC
RD16 TMR3ON 0000 0000
F78h TMR4 Timer4 Register 0000 0000
F77h PR4 Timer4 Period Register 1111 1111
F76h T4CON
— T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000
F75h SSP2BUF MSSP2 Receive Buffer/Transmit Register xxxx xxxx
F74h SSP2ADD MSSP2 Address Register (I
2
C™ Slave Mode). MSSP2 Baud Rate Reload Register (I
2
C Master Mode). ---- ----
F74h SSP2MSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 0000 0000
F73h SSP2STAT SMP CKE D/A
PSR/WUA BF 1111 1111
F72h SSP2CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000
F71h SSP2CON2 GCEN ACKSTAT ACKDT
ADMSK5
ACKEN
ADMSK4
RCEN
ADMSK3
PEN
ADMSK2
RSEN
ADMSK1
SEN 0000 0000
F70h CMSTAT
— — — — — COUT3 COUT2 COUT1 ---- -111
F6Fh PMADDRH/
PMDOUT1H
(1)
— CS1 Parallel Master Port Address High Byte -000 0000
Parallel Port Out Data High Byte (Buffer 1) 0000 0000
F6Eh PMADDRL/
PMDOUT1L
(1)
Parallel Master Port Address Low Byte/
Parallel Port Out Data Low Byte (Buffer 1)
0000 0000
F6Dh PMDIN1H
(1)
Parallel Port In Data High Byte (Buffer 1) 0000 0000
F6Ch PMDIN1L
(1)
Parallel Port In Data Low Byte (Buffer 1) 0000 0000
F6Bh TXADDRL SPI DMA Transmit Data Pointer Low Byte xxxx xxxx
F6Ah TXADDRH
— — — — SPI DMA Transmit Data Pointer High Byte ---- xxxx
F69h RXADDRL SPI DMA Receive Data Pointer Low Byte xxxx xxxx
F68h RXADDRH
— — — — SPI DMA Receive Data Pointer High Byte ---- xxxx
F67h DMABCL SPI DMA Byte Count Low Byte xxxx xxxx
F66h DMABCH
— — — — — — SPI DMA Byte Count High
Byte
---- --xx
F65h UCON
(1)
— PPBRST SE0 PKTDIS USBEN RESUME SUSPND — -0x0 000-
F64h USTAT
— ENDP3 ENDP2 ENDP1 ENDP0 DIR PPBI — -xxx xxx-
F63h UEIR BTSEF
— — BTOEF DFN8EF CRC16EF CRC5EF PIDEF 0--0 0000
F62h UIR
— SOFIF STALLIF IDLEIF TRNIF ACTVIF UERRIF URSTIF -000 0000
F61h UFRMH
— — — — — FRM10 FRM9 FRM8 ---- -xxx
F60h UFRML FRM7 FRM6 FRM5 FRM4 FRM3 FRM2 FRM1 FRM0 xxxx xxxx
F5Fh PMCONH
(1)
PMPEN — PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN 0-00 0000
F5Eh PMCONL
(1)
CSF1 CSF0 ALP — CS1P BEP WRSP RDSP 000- 0000
F5Dh PMMODEH
(1)
BUSY IRQM1 IRQM0 INCM1 INCM0 MODE16 MODE1 MODE0 0000 0000
F5Ch PMMODEL
(1)
WAITB1 WAITB0 WAITM3 WAITM2 WAITM1 WAITM0 WAITE1 WAITE0 0000 0000
F5Bh PMDOUT2H
(1)
Parallel Port Out Data High Byte (Buffer 2) 0000 0000
F5Ah PMDOUT2L
(1)
Parallel Port Out Data Low Byte (Buffer 2) 0000 0000
F59h PMDIN2H
(1)
Parallel Port In Data High Byte (Buffer 2) 0000 0000
F58h PMDIN2L
(1)
Parallel Port In Data Low Byte (Buffer 2) 0000 0000
F57h PMEH
(1)
PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 0000 0000
F56h PMEL
(1)
PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0 0000 0000
F55h PMSTATH
(1)
IBF IBOV — — IB3F IB2F IB1F IB0F 00-- 0000
F54h PMSTATL
(1)
OBE OBUF — — OB3E OB2E OB1E OB0E 10-- 1111
TABLE 6-4: REGISTER FILE SUMMARY (PIC18F47J53 FAMILY) (CONTINUED)
Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Note 1: Implemented only for 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
2: Implemented only for 28-pin devices (PIC18F26J53, PIC18F27J53, PIC18LF26J53 and PIC18LF27J53).
3: Implemented only for devices with 128 Kbyte of program memory (PIC18F27J53, PIC18F47J53, PIC18LF27J53 and PIC18LF47J53).