Datasheet

PIC18F47J53 FAMILY
DS39964B-page 74 Preliminary  2010 Microchip Technology Inc.
IPR1 PIC18F2XJ53 PIC18F4XJ53 1111 1111 1111 1111 uuuu uuuu
PIR1 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
(3)
PIE1 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
RCSTA2 PIC18F2XJ53 PIC18F4XJ53 0000 000x 0000 000x uuuu uuuu
OSCTUNE PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
T1GCON PIC18F2XJ53 PIC18F4XJ53 0000 0x00 0000 0x00 uuuu uuuu
T3GCON PIC18F2XJ53 PIC18F4XJ53 0000 0x00 uuuu uxuu uuuu uxuu
TRISE
(5)
PIC18F2XJ53 PIC18F4XJ53 00-- -111 uu-- -111 uu-- -uuu
TRISD
(5)
PIC18F2XJ53 PIC18F4XJ53 1111 1111 1111 1111 uuuu uuuu
TRISC PIC18F2XJ53 PIC18F4XJ53 11-- -111 11-- -111 uu-- -uuu
TRISB PIC18F2XJ53 PIC18F4XJ53 1111 1111 1111 1111 uuuu uuuu
TRISA PIC18F2XJ53 PIC18F4XJ53 111- 1111 111- 1111 uuu- uuuu
LATE
(5)
PIC18F2XJ53 PIC18F4XJ53 ---- -xxx ---- -uuu ---- -uuu
LATD
(5)
PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
LATC PIC18F2XJ53 PIC18F4XJ53 xx-- -xxx uu-- -uuu uu-- -uuu
LATB PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
LATA PIC18F2XJ53 PIC18F4XJ53 xxx- xxxx uuu- uuuu uuu- uuuu
DMACON1 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
OSCCON2 PIC18F2XJ53 PIC18F4XJ53 -0-1 01-- — —
DMACON2 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
HLVDCON PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
PORTE
(5)
PIC18F2XJ53 PIC18F4XJ53 ---- -xxx ---- -uuu ---- -uuu
PORTD
(5)
PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
PORTC PIC18F2XJ53 PIC18F4XJ53 xxxx -xxx uuuu -uuu uuuu -uuu
PORTB PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
PORTA PIC18F2XJ53 PIC18F4XJ53 xxx- xxxx uuu- uuuu uuu- uuuu
SPBRGH1 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
BAUDCON1 PIC18F2XJ53 PIC18F4XJ53 0100 0-00 0100 0-00 uuuu u-uu
SPBRGH2 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
BAUDCON2 PIC18F2XJ53 PIC18F4XJ53 0100 0-00 0100 0-00 uuuu u-uu
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
5: Not implemented for PIC18F2XJ53 devices.
6: Not implemented for “LF” devices.