Datasheet

PIC18F47J13 FAMILY
DS39974A-page 96 Preliminary 2010 Microchip Technology Inc.
F7Dh SPBRGH2 EUSART2 Baud Rate Generator High Byte 0000 0000
F7Ch BAUDCON2 ABDOVF RCIDL RXDTP TXCKP BRG16
WUE ABDEN 0100 0-00
F7Bh TMR3H Timer3 Register High Byte xxxx xxxx
F7Ah TMR3L Timer3 Register Low Byte xxxx xxxx
F79h T3CON TMR3CS1 TMR3CS0 T3CKPS1 T3CKPS0 T3OSCEN T3SYNC
RD16 TMR3ON 0000 0000
F78h TMR4 Timer4 Register 0000 0000
F77h PR4 Timer4 Period Register 1111 1111
F76H T4CON
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000
F75h SSP2BUF MSSP2 Receive Buffer/Transmit Register xxxx xxxx
F74h SSP2ADD MSSP2 Address Register (I
2
C™ Slave mode)/MSSP2 Baud Rate Reload Register (I
2
C Master mode) 0000 0000
F74h SSP2MSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 1111 1111
F73h SSP2STAT SMP CKE D/A
PSR/WUA BF 0000 0000
F72h SSP2CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000
F71h SSP2CON2 GCEN ACKSTAT ACKDT
ADMSK5
ACKEN
ADMSK4
RCEN
ADMSK3
PEN
ADMSK2
RSEN
ADMSK1
SEN 0000 0000
F70h CMSTAT
COUT3 COUT2 COUT1 ---- -111
F6Fh PMADDRH/
PMDOUT1H
(2)
CS1 Parallel Master Port Address High Byte -000 0000
Parallel Port Out Data High Byte (Buffer 1) 0000 0000
F6Eh PMADDRL/
PMDOUT1L
(2)
Parallel Master Port Address Low Byte/
Parallel Port Out Data Low Byte (Buffer 1)
0000 0000
F6Dh PMDIN1H
(2)
Parallel Port In Data High Byte (Buffer 1) 0000 0000
F6Ch PMDIN1L
(2)
Parallel Port In Data Low Byte (Buffer 1) 0000 0000
F6Bh TXADDRL SPI DMA Transmit Data Pointer Low Byte 0000 0000
F6Ah TXADDRH
SPI DMA Transmit Data Pointer High Byte ---- 0000
F69h RXADDRL SPI DMA Receive Data Pointer Low Byte 0000 0000
F68h RXADDRH
SPI DMA Receive Data Pointer High Byte ---- 0000
F67h DMABCL SPI DMA Byte Count Low Byte 0000 0000
F66h DMABCH
SPI DMA Byte Count High
Byte
---- --00
F5Fh PMCONH
(2)
PMPEN ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN 0--0 0000
F5Eh PMCONL
(2)
CSF1 CSF0 ALP CS1P BEP WRSP RDSP 000- 0000
F5Dh PMMODEH
(2)
BUSY IRQM1 IRQM0 INCM1 INCM0 MODE16 MODE1 MODE0 0000 0000
F5Ch PMMODEL
(2)
WAITB1 WAITB0 WAITM3 WAITM2 WAITM1 WAITM0 WAITE1 WAITE0 0000 0000
F5Bh PMDOUT2H
(2)
Parallel Port Out Data High Byte (Buffer 2) 0000 0000
F5Ah PMDOUT2L
(2)
Parallel Port Out Data Low Byte (Buffer 2) 0000 0000
F59h PMDIN2H
(2)
Parallel Port In Data High Byte (Buffer 2) 0000 0000
F58h PMDIN2L
(2)
Parallel Port In Data Low Byte (Buffer 2) 0000 0000
F57h PMEH
(2)
PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 0000 0000
F56h PMEL
(2)
PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0 0000 0000
F55h PMSTATH
(2)
IBF IBOV IB3F IB2F IB1F IB0F 00-- 0000
F54h PMSTATL
(2)
OBE OBUF OB3E OB2E OB1E OB0E 10-- 1111
F53h CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 0000 0000
F52h CCPTMRS0 C3TSEL1 C3TSEL0 C2TSEL2 C2TSEL1 C2TSEL0 C1TSEL2 C1TSEL1 C1TSEL0 0000 0000
F51h CCPTMRS1 C7TSEL1 C7TSEL0
C6TSEL0 C5TSEL0 C4TSEL1 C4TSEL0 00-0 -000
F50h CCPTMRS2
C10TSEL0 C9TSEL0 C8TSEL1 C8TSEL0 ---0 -000
F4Fh DSGPR1 Deep Sleep Persistent General Purpose Register (contents retained even in Deep Sleep) xxxx xxxx
F4Eh DSGPR0 Deep Sleep Persistent General Purpose Register (contents retained even in Deep Sleep) xxxx xxxx
F4Dh DSCONH DSEN
CFGPER2 DSULPEN RTCWDIS 0--- -000
F4Ch DSCONL
ULPWDIS DSBOR RELEASE ---- -000
TABLE 6-4: REGISTER FILE SUMMARY (PIC18F47J13 FAMILY) (CONTINUED)
Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Note 1: Applicable for 28-pin devices (PIC18F26J13, PIC18F27J13, PIC18LF26J13 and PIC18LF27J13).
2: Applicable for 44-pin devices (PIC18F46J13, PIC18F47J13, PIC18LF46J13 and PIC18LF47J13).
3: Value on POR, BOR.