Datasheet
PIC18F47J13 FAMILY
DS39974A-page 548 Preliminary 2010 Microchip Technology Inc.
Multiple Sleep Commands ......................................... 48
Run Modes ................................................................. 49
PRI_RUN ...........................................................49
RC_RUN ............................................................ 50
SEC_RUN .......................................................... 49
Sleep Mode ................................................................ 51
Summary (table) .........................................................48
Ultra Low-Power Wake-up .........................................61
M
Master Clear (MCLR) ......................................................... 67
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization .........................................................81
Data Memory ..............................................................88
Program Memory .......................................................81
Return Address Stack ................................................83
Memory Programming Requirements ..............................502
Microchip Internet Web Site .............................................554
MOVF ...............................................................................457
MOVFF .............................................................................458
MOVLB .............................................................................458
MOVLW ............................................................................ 459
MOVSF ............................................................................477
MOVSS ............................................................................ 478
MOVWF ........................................................................... 459
MPLAB ASM30 Assembler, Linker, Librarian .................. 484
MPLAB Integrated Development Environment
Software ................................................................... 483
MPLAB PM3 Device Programmer ....................................486
MPLAB REAL ICE In-Circuit Emulator System ................ 485
MPLINK Object Linker/MPLIB Object Librarian ............... 484
MSSP
ACK
Pulse ........................................................ 315, 318
I
2
C Mode. See I
2
C Mode.
Module Overview ..................................................... 291
SPI Master/Slave Connection .................................. 296
TMR4/6/8 Output for Clock Shift ..............................234
MULLW ............................................................................460
MULWF ............................................................................460
N
NEGF ............................................................................... 461
NOP .................................................................................461
Notable Differences Between PIC18F47J13
and PIC18F46J11 Families ...................................... 541
O
Oscillator Configurations .................................................... 35
Internal Oscillator Block ............................................. 38
Oscillator Control ........................................................35
Oscillator Modes ........................................................35
Oscillator Types ......................................................... 35
Switching .................................................................... 41
Transitions .................................................................. 42
Oscillator Selection .......................................................... 415
Oscillator Start-up Timer (OST) .........................................45
Oscillator, Timer1 ............................................. 209, 213, 226
Oscillator, Timer3 ............................................................. 221
P
See Enhanced Capture/Compare/PWM (ECCP).
Packaging
Details ......................................................................531
Marking .................................................................... 529
Parallel Master Port (PMP) .............................................. 179
Application Examples .............................................. 201
Associated Registers ............................................... 203
Data Registers ......................................................... 186
Master Port Modes .................................................. 193
Module Registers ..................................................... 180
Slave Port Modes .................................................... 188
Peripheral Module Disable (PMD) ..................................... 63
Peripheral Pin Select (PPS) ............................................. 158
Peripheral Pin Select Registers ................................163–178
PIE Registers ............................................................129–132
Pin Functions
AV
DD1 ........................................................................ 29
AV
DD2 ........................................................................ 29
AV
SS1 ........................................................................ 29
MCLR
....................................................................16, 22
OSC1/CLKI/RA7 ...................................................16, 22
OSC2/CLKO/RA6 .................................................16, 22
RA0/AN0/C1INA/ULPWU/PMA6/RP0 ....................... 23
RA0/AN0/C1INA/ULPWU/RP0 .................................. 17
RA1/AN1/C2INA/V
BG ................................................. 23
RA1/AN1/C2INA/V
BG/CTDIN/RP1 ............................. 17
RA2/AN2/C2INB/C1IND/C3INB/V
REF-/CVREF ......17, 23
RA3/AN3/C1INB/V
REF+ ........................................17, 23
RA5/AN4/C1INC/SS1
/HLVDIN/RP2 .....................17, 23
RA6 .......................................................................17, 23
RA7 .......................................................................17, 23
RB0/AN12/C3IND/INT0/RP3 ................................18, 24
RB1/AN10/C3INC/PMBE/RTCCS/RP4 ..................... 24
RB1/AN10/C3INC/RTCC/RP4 ................................... 18
RB2/AN8/C2INC/CTED1/PMA3/REFO/RP5 ............. 24
RB2/AN8/C2INC/CTED1/REFO/RP5 ........................ 18
RB3/AN9/C3INA/CTED2/PMA2/RP6 ......................... 24
RB3/AN9/C3INA/CTED2/RP6 ................................... 18
RB4/CCP4/KBI0/SCL2/RP7 ...................................... 19
RB4/CCP4/PMA1/KBI0/RP7 ...................................... 25
RB5/CCP5/KBI1/SDA2/RP8 ...................................... 19
RB5/CCP5/PMA0/KBI1/RP8 ...................................... 25
RB6/CCP6/KBI2/PGC/RP9 ...................................19, 25
RB7/CCP7/KBI3/PGD/RP10 .................................19, 25
RC0/T1OSO/T1CKI/RP11 ....................................20, 26
RC1/CCP8/T1OSI/RP12 .......................................20, 26
RC2/AN11/C2IND/CTPLS/RP13 ..........................20, 26
RC3/SCK1/SCL1/RP14 ........................................20, 26
RC4/SDI1/SDA1/RP15 .........................................20, 26
RC5/SDO1/RP16 ..................................................20, 26
RC6/CCP9/PMA5/TX1/CK1/RP17 ............................. 27
RC6/CCP9/TX1/CK1/RP17 ....................................... 20
RC7/CCP10/PMA4/RX1/DT1/RP18 .......................... 27
RC7/CCP10/RX1/DT1/RP18
..................................... 20
RD0/PMD0/SCL2 ....................................................... 28
RD1/PMD1/SDA2 ...................................................... 28
RD2/PMD2/RP19 ....................................................... 28
RD3/PMD3/RP20 ....................................................... 28
RD4/PMD4/RP21 ....................................................... 28
RD5/PMD5/RP22 ....................................................... 28
RD6/PMD6/RP23 ....................................................... 28
RD7/PMD7/RP24 ....................................................... 28
RE0/AN5/PMRD ........................................................ 29
RE1/AN6/PMWR ....................................................... 29
RE2/AN7/PMCS ........................................................ 29
V
DD ............................................................................ 21
V
DD1 .......................................................................... 29
V
DD2 .......................................................................... 29
V
DDCORE/VCAP ......................................................29, 21