Datasheet

PIC18F47J13 FAMILY
DS39974A-page 362 Preliminary  2010 Microchip Technology Inc.
FIGURE 21-12: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 21-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
PIR1 PMPIF
(1)
ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF
PIE1 PMPIE
(1)
ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE
IPR1
PMPIP
(1)
ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP
PIR3 SSP2IF BCL2IF RC2IF TX2IF TMR4IF CTMUIF TMR3GIF RTCCIF
PIE3 SSP2IE BCL2IE RC2IE TX2IE TMR4IE CTMUIE TMR3GIE RTCCIE
IPR3
SSP2IP BCL2IP RC2IP TX2IP TMR4IP CTMUIP TMR3GIP RTCCIP
RCSTAx SPEN RX9 SREN CREN ADDEN FERR OERR RX9D
TXREGx EUSARTx Transmit Register
TXSTAx CSRC TX9 TXEN SYNC
SENDB BRGH TRMT TX9D
BAUDCONx ABDOVF RCIDL RXDTP TXCKP BRG16 — WUE ABDEN
SPBRGHx EUSARTx Baud Rate Generator High Byte
SPBRGx EUSARTx Baud Rate Generator Low Byte
ODCON2
— — — — CCP10OD CCP9OD U2OD U1OD
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
Note 1: These pins are only available on 44-pin devices.
RC7/CCP10/PMA4/RX1/DT1/
RC6/CCP9/PMA5/TX1/CK1/
Write to
TXREG1 reg
TX1IF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6 bit 7
TXEN bit
Note: This example is equally applicable to EUSART2 (RPn1/TX2/CK2 and RPn2/RX2/DT2).
RP18 Pin
RP17 Pin