Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 221
PIC18F47J13 FAMILY
15.0 TIMER3/5 MODULE
The Timer3/5 timer/counter modules incorporate these
features:
• Software selectable operation as a 16-bit timer or
counter
• Readable and writable 8-bit registers (TMRxH
and TMRxL)
• Selectable clock source (internal or external) with
device clock or Timer1 oscillator internal options
• Interrupt-on-overflow
• Module Reset on ECCP Special Event Trigger
A simplified block diagram of the Timer3/5 module is
shown in Figure 15-1.
The Timer3/5 module is controlled through the TxCON
register (Register 15-1). It also selects the clock source
options for the ECCP modules. (For more information,
see Section 19.1.1 “ECCP Module and Timer
Resources”.)
The F
OSC clock source should not be used with the
ECCP capture/compare features. If the timer will be
used with the capture or compare features, always
select one of the other timer clocking options.
Note: Throughout this section, generic references
are used for register and bit names that are the
same – except for an ‘x’ variable that indicates
the item’s association with the Timer3 or
Timer5 module. For example, the control
register is named TxCON, and refers to
T3CON and T5CON.