Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 143
PIC18F47J13 FAMILY
10.2 PORTA, TRISA and LATA Registers
PORTA is a 7-bit wide, bidirectional port. It may
function as a 5-bit port, depending on the oscillator
mode selected. Setting a TRISA bit (= 1) will make the
corresponding PORTA pin an input (i.e., put the
corresponding output driver in a High-Impedance
mode). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., put the
contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins, whereas writing to it, will write to the port latch.
The Data Latch (LATA) register is also memory mapped.
Read-modify-write operations on the LATA register read
and write the latched output value for PORTA.
The other PORTA pins are multiplexed with analog
inputs, the analog V
REF+ and VREF- inputs and the com-
parator voltage reference output. The operation of pins,
RA<3:0> and RA5, as A/D Converter inputs is selected
by clearing or setting the control bits in the ANCON0
register (A/D Port Configuration Register 0).
The RAx pins may also be used as comparator inputs
by setting the appropriate bits in the CMxCON registers.
To use RAx as digital inputs, it is necessary to turn off
the comparators.
All PORTA pins have TTL input levels and full CMOS
output drivers.
The TRISA register controls the direction of the PORTA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 10-2: INITIALIZING PORTA
REGISTER 10-4: PADCFG1: PAD CONFIGURATION CONTROL REGISTER 1 (BANKED F3Ch)
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
— — — — — RTSECSEL1
(1)
RTSECSEL0
(1)
PMPTTL
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-3 Unimplemented: Read as ‘0’
bit 2-1 RTSECSEL<1:0>: RTCC Seconds Clock Output Select bits
(1)
11 = Reserved; do not use
10 = RTCC source clock is selected for the RTCC pin (can be INTRC, T1OSC or T1CKI depending
upon the RTCOSC (CONFIG3L<1>) and T1OSCEN (T1CON<3>) bit settings)
01 = RTCC seconds clock is selected for the RTCC pin
00 = RTCC alarm pulse is selected for the RTCC pin
bit 0 PMPTTL: PMP Module TTL Input Buffer Select bit
1 = PMP module uses TTL input buffers
0 = PMP module uses Schmitt Trigger input buffers
Note 1: To enable the actual RTCC output, the RTCOE (RTCCFG<2>) bit needs to be set.
Note: On a Power-on Reset (POR), RA5 and
RA<3:0> are configured as analog inputs
and read as ‘0’.
CLRF PORTA ; Initialize PORTA by
; clearing output
; data latches
CLRF LATA ; Alternate method
; to clear output
; data latches
MOVLB 0x0F ; ANCONx register not in
; Access Bank
MOVLW 0x0F ; Configure A/D
MOVWF ANCON0 ; for digital inputs
MOVLW 0xCF ; Value used to
; initialize data
; direction
MOVWF TRISA ; Set RA<3:0> as inputs
; RA<5:4> as outputs