Datasheet
PIC18F47J13 FAMILY
DS39974A-page 544 Preliminary 2010 Microchip Technology Inc.
Break Character (12-Bit) Transmit and Receive .............. 360
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) .....................................................67
and On-Chip Voltage Regulator ...............................427
Detecting .................................................................... 67
Disabling in Sleep Mode ............................................67
BSF .................................................................................. 445
BTFSC .............................................................................446
BTFSS .............................................................................. 446
BTG ..................................................................................447
BZ .....................................................................................448
C
C Compilers
MPLAB C18 ............................................................. 484
Calibration (A/D Converter) .............................................. 377
CALL ................................................................................ 448
CALLW .............................................................................477
Capture (CCP Module) .....................................................262
Associated Registers ...............................................265
CCP Pin Configuration ............................................. 262
CCPR4H:CCPR4L Registers ...................................262
Software Interrupt .....................................................263
Timer1/Timer3 Mode Selection ................................262
Capture (ECCP Module) ..................................................272
CCPRxH:CCPRxL Registers ................................... 272
ECCP Pin Configuration ........................................... 272
Prescaler .................................................................. 273
Software Interrupt .....................................................273
Timer1/Timer3 Mode Selection ................................273
Capture/Compare/PWM (CCP) ........................................ 257
Capture Mode .......................................................... 262
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................261
CCPRxH Register .................................................... 261
CCPRxL Register .....................................................261
Compare Mode. See Compare.
Configuration ............................................................ 261
Open-Drain Output Option .......................................262
CCP .................................................................................. 261
Clock Sources .................................................................... 41
Effects of Power-Managed Modes ............................. 45
Selecting the 31 kHz Source ...................................... 41
Selection Using OSCCON Register ........................... 41
CLRF ................................................................................449
CLRWDT .......................................................................... 449
Code Examples
16 x 16 Signed Multiply Routine ............................... 118
16 x 16 Unsigned Multiply Routine ........................... 118
512-Byte SPI Master Mode Init and Transfer ...........308
8 x 8 Signed Multiply Routine ................................... 117
8 x 8 Unsigned Multiply Routine ............................... 117
A/D Calibration Routine ............................................ 378
Calculating Baud Rate Error ....................................350
Capacitance Calibration Routine ..............................404
Capacitive Touch Switch Routine ............................406
Changing Between Capture Prescalers ........... 263, 273
Communicating with the +5V System ...................... 140
Computed GOTO Using an Offset Value ................... 85
Configuring EUSART2 Input and
Output Functions ..............................................162
Current Calibration Routine ...................................... 402
Erasing Flash Program Memory ..............................112
Fast Register Stack ....................................................85
How to Clear RAM (Bank 1) Using
Indirect Addressing .......................................... 101
Initializing PORTA .................................................... 143
Initializing PORTB .................................................... 146
Initializing PORTC ................................................... 150
Initializing PORTD ................................................... 153
Initializing PORTE .................................................... 156
Loading the SSP1BUF (SSP1SR) Register ............. 295
Reading a Flash Program Memory Word ................ 111
Saving STATUS, WREG and BSR
Registers in RAM ............................................. 138
Setting the RTCWREN Bit ....................................... 251
Setup for CTMU Calibration Routines ..................... 401
Single-Word Write to Flash Program Memory ......... 115
Two-Word Instructions ............................................... 87
Ultra Low-Power Wake-up Initialization ..................... 62
Writing to Flash Program Memory ........................... 114
Code Protection ............................................................... 415
COMF .............................................................................. 450
Comparator ...................................................................... 379
Analog Input Connection Considerations ................ 382
Associated Registers ............................................... 385
Configuration ........................................................... 383
Control ..................................................................... 383
Effects of a Reset .................................................... 385
Enable and Input Selection ...................................... 383
Enable and Output Selection ................................... 383
Interrupts .................................................................. 384
Operation ................................................................. 382
Operation During Sleep ........................................... 385
Registers .................................................................. 379
Response Time ........................................................ 382
Comparator Specifications ............................................... 503
Comparator Voltage Reference ....................................... 387
Accuracy and Error .................................................. 389
Associated Registers ............................................... 389
Configuring .............................................................. 388
Connection Considerations ...................................... 389
Effects of a Reset .................................................... 389
Operation During Sleep ........................................... 389
Compare (CCP Module) .................................................. 263
CCP Pin Configuration ............................................. 263
CCPR4 Register ...................................................... 263
Software Interrupt .................................................... 263
Special Event Trigger .............................................. 263
Timer1/Timer3 Mode Selection ................................ 263
Compare (ECCP Module) ................................................ 274
CCPRx Register ...................................................... 274
Pin Configuration ..................................................... 274
Software Interrupt Mode .......................................... 274
Special Event Trigger .......................................230, 274
Timer1/Timer3 Mode Selection ................................ 274
Computed GOTO ............................................................... 85
Configuration Bits ............................................................ 415
Configuration Mismatch (CM) Reset .................................. 68
Configuration Register Protection .................................... 430
Configuration Registers
Bits and Device IDs ................................................. 416
Mapping Flash Configuration Words ....................... 416
Core Features
Easy Migration ........................................................... 12
Expanded Memory ..................................................... 12
Extended Instruction Set ............................................ 12
nanoWatt XLP Technology ........................................ 11
Oscillator Options and Features ................................ 11
CPFSEQ .......................................................................... 450
CPFSGT .......................................................................... 451