Datasheet

PIC18F47J13 FAMILY
DS39974A-page 388 Preliminary  2010 Microchip Technology Inc.
24.1 Configuring the Comparator
Voltage Reference
The comparator voltage reference module is controlled
through the CVRCON register (Register 24-1). The
comparator voltage reference provides two ranges of
output voltage, each with 16 distinct levels. The range
to be used is selected by the CVRR bit (CVRCON<5>).
The primary difference between the ranges is the size
of the steps selected by the CV
REF Selection bits
(CVR<3:0>), with one range offering finer resolution.
The equations used to calculate the output of the
comparator voltage reference are as follows:
EQUATION 24-1: CALCULATING OUTPUT
OF THE COMPARATOR
VOLTAGE REFERENCE
The comparator reference supply voltage can come
from either V
DD and VSS, or the external VREF+ and
V
REF- that are multiplexed with RA2 and RA3. The
voltage source is selected by the CVRSS bit
(CVRCON<4>).
The settling time of the comparator voltage reference
must be considered when changing the CV
REF
output (see Table 30-2 in Section 30.0 “Electrical
Characteristics”).
When CVRR = 1 and CVRSS = 0:
CVREF = ((CVR<3:0>)/24) x (AVDD - AVSS)
When CVRR =
0 and CVRSS = 0:
CVREF =(CVRSRC/4) + ((CVR<3:0>)/32) x (AVDD - AVSS)
When CVRR =
1 and CVRSS = 1:
CVREF = ((CVR<3:0>)/24) x ((VREF+) – VREF-)
When CVRR =
0 and CVRSS = 1:
CVREF =(CVRSRC/4) + ((CVR<3:0>)/32) x ((VREF+) – VREF-)
REGISTER 24-1: CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER (F53h)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CVREN CVROE
(1)
CVRR CVRSS CVR3 CVR2 CVR1 CVR0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CVREN: Comparator Voltage Reference Enable bit
1 =CV
REF circuit is powered on
0 =CV
REF circuit is powered down
bit 6 CVROE: Comparator V
REF Output Enable bit
(1)
1 =CVREF voltage level is also output on the RA2/AN2//C2INB/C1IND/C3INB/VREF-/CVREF pin
0 =CV
REF voltage is disconnected from the RA2/AN2//C2INB/C1IND/C3INB/VREF-/CVREF pin
bit 5 CVRR: Comparator V
REF Range Selection bit
1 = 0 to 0.667 CV
RSRC with CVRSRC/24 step size (low range)
0 = 0.25 CV
RSRC to 0.75 CVRSRC with CVRSRC/32 step size (high range)
bit 4 CVRSS: Comparator V
REF Source Selection bit
1 = Comparator reference source, CV
RSRC = (VREF+) – (VREF-)
0 = Comparator reference source, CV
RSRC = AVDD – AVSS
bit 3-0 CVR<3:0>: Comparator VREF Value Selection bits (0  (CVR<3:0>)  15)
When CVRR = 1:
CVREF = ((CVR<3:0>)/24)  (CVRSRC)
When CVRR =
0:
CVREF = (CVRSRC/4) + ((CVR<3:0>)/32)  (CVRSRC)
Note 1: CVROE overrides the TRIS bit setting.