Datasheet
2010 Microchip Technology Inc. Preliminary DS39974A-page 167
PIC18F47J13 FAMILY
REGISTER 10-17: RPINR16: PERIPHERAL PIN SELECT INPUT REGISTER 16 (BANKED EF7h)
U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
— — — RX2DT2R4 RX2DT2R3 RX2DT2R2 RX2DT2R1 RX2DT2R0
bit 7 bit 0
Legend: R/W
= Readable bit, Writable bit if IOLOCK = 0
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4-0 RX2DT2R<4:0>: EUSART2 Synchronous/Asynchronous Receive (RX2/DT2) to the Corresponding
RPn Pin bits
REGISTER 10-18: RPINR15: PERIPHERAL PIN SELECT INPUT REGISTER 15 (BANKED EE7h)
U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
— — — T5CKR4 T5CKR3 T5CKR2 T5CKR1 T5CKR0
bit 7 bit 0
Legend: R/W
= Readable bit, Writable bit if IOLOCK = 0
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4-0 T5CKR<4:0>: Timer5 External Clock Input (T5CKI) to the Corresponding RPn Pin bits
REGISTER 10-19: RPINR17: PERIPHERAL PIN SELECT INPUT REGISTER 17 (BANKED EF8h)
U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
— — — CK2R4 CK2R3 CK2R2 CK2R1 CK2R0
bit 7 bit 0
Legend: R/W
= Readable bit, Writable bit if IOLOCK = 0
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4-0 CK2R<4:0>: EUSART2 Clock Input (CK2) to the Corresponding RPn Pin bits