Datasheet
2010 Microchip Technology Inc. Preliminary DS39974A-page 421
PIC18F47J13 FAMILY
REGISTER 27-6: CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
U-1 U-1 U-1 U-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1
— — — — MSSPMSK PLLSEL ADCSEL IOL1WAY
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Unimplemented: Program the corresponding Flash Configuration bit to ‘1’
bit 3 MSSPMSK: MSSP 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode is enabled
0 = 5-Bit Address Masking mode is enabled
bit 2 PLLSEL: PLL Circuit Selection bit
1 = 4x PLL circuit is selected
0 = 96 MHz PLL circuit is selected
bit 1 ADCSEL: A/D Converter Mode bit
1 = 10-Bit Conversion mode is enabled
0 = 12-Bit Conversion mode is enabled
bit 0 IOL1WAY: IOLOCK One-Way Set Enable bit
1 = IOLOCK bit (PPSCON<0>) can be set once, provided the unlock sequence has been completed;
once set, the Peripheral Pin Select registers cannot be written to a second time
0 = IOLOCK bit (PPSCON<0>) can be set and cleared as needed, provided the unlock sequence has
been completed
REGISTER 27-7: CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1
WPCFG WPFP6 WPFP5 WPFP4 WPFP3 WPFP2 WPFP1 WPFP0
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 WPCFG: Write/Erase Protect Configuration Region Select bit (valid when WPDIS = 0)
1 = Configuration Words page is not erase/write-protected unless WPEND and WPFP<5:0> settings
include the Configuration Words page
(1)
0 = Configuration Words page is erase/write-protected, regardless of WPEND and WPFP<5:0>
(1)
bit 6-0 WPFP<6:0>: Write/Erase Protect Page Start/End Location bits
Used with the WPEND bit to define which pages in Flash will be erase/write-protected.
Note 1: The “Configuration Words page” contains the FCWs and is the last page of implemented Flash memory on
a given device. Each page consists of 1,024 bytes. For example, on a device with 64 Kbytes of Flash, the
first page is 0 and the last page (Configuration Words page) is 63 (3Fh).