Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 301
PIC18F47J13 FAMILY
TABLE 20-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
PIR1 PMPIF
(2)
ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF
PIE1 PMPIE
(2)
ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE
IPR1
PMPIP
(2)
ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP
PIR3 SSP2IF BCL2IF RC2IF TX2IF TMR4IF CTMUIF TMR3GIF RTCCIF
PIE3 SSP2IE BCL2IE RC2IE TX2IE TMR4IE CTMUIE TMR3GIE RTCCIE
IPR3 SSP2IP
BCL2IP RC2IP TX2IP TMR4IP CTMUIP TMR3GIP RTCCIP
TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
TRISC TRISC7 TRISC6 — — — TRISC2 TRISC1 TRISC0
TRISD TRISD7 TRISD6 TRISD5 TRISD4
TRISD3 TRISD2 TRISD1 TRISD0
SSP1BUF MSSP1 Receive Buffer/Transmit Register
SSPxCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0
SSPxSTAT SMP CKE
D/A P S R/W UA BF
SSP2BUF MSSP2 Receive Buffer/Transmit Register
ODCON3
(1)
CTMUDS — — — — — SPI2OD SPI1OD
Legend: Shaded cells are not used by the MSSPx module in SPI mode.
Note 1: Configuration SFR overlaps with default SFR at this address; available only when WDTCON<4> = 1.
2: These bits are only available on 44-pin devices.