Datasheet

PIC18F47J13 FAMILY
DS39974A-page 28 Preliminary  2010 Microchip Technology Inc.
PORTD is a bidirectional I/O port.
RD0/PMD0/SCL2
RD0
PMD0
SCL2
38
(3)
38
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
I
2
C
Digital I/O.
Parallel Master Port data.
I
2
C™ data input/output.
RD1/PMD1/SDA2
RD1
PMD1
SDA2
39
(3)
39
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
I
2
C
Digital I/O.
Parallel Master Port data.
I
2
C data input/output.
RD2/PMD2/RP19
RD2
PMD2
RP19
40
(3)
40
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
ST/DIG
Digital I/O.
Parallel Master Port data.
Remappable Peripheral Pin 19 input/output.
RD3/PMD3/RP20
RD3
PMD3
RP20
41
(3)
41
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
ST/DIG
Digital I/O.
Parallel Master Port data.
Remappable Peripheral Pin 20 input/output.
RD4/PMD4/RP21
RD4
PMD4
RP21
2
(3)
2
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
ST/DIG
Digital I/O.
Parallel Master Port data.
Remappable Peripheral Pin 21 input/output.
RD5/PMD5/RP22
RD5
PMD5
RP22
3
(3)
3
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
ST/DIG
Digital I/O.
Parallel Master Port data.
Remappable Peripheral Pin 22 input/output.
RD6/PMD6/RP23
RD6
PMD6
RP23
4
(3)
4
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
ST/DIG
Digital I/O.
Parallel Master Port data.
Remappable Peripheral Pin 23 input/output.
RD7/PMD7/RP24
RD7
PMD7
RP24
5
(3)
5
(3)
I/O
I/O
I/O
ST/DIG
ST/TTL/
DIG
ST/DIG
Digital I/O.
Parallel Master Port data.
Remappable Peripheral Pin 24 input/output.
TABLE 1-4: PIC18F4XJ13 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
44-
QFN
44-
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
DIG = Digital output I
2
C™ = Open-Drain, I
2
C specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
2: Available only on 44-pin devices (PIC18F46J13, PIC18F47J13, PIC18LF46J13 and PIC18LF47J13).
3: 5.5V tolerant.