Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 17
PIC18F47J13 FAMILY
PORTA is a bidirectional I/O port.
RA0/AN0/C1INA/ULPWU/RP0
RA0
AN0
C1INA
ULPWU
RP0
227
I/O
I
I
I
I/O
TTL/DIG
Analog
Analog
Analog
ST/DIG
Digital I/O.
Analog Input 0.
Comparator 1 Input A.
Ultra low-power wake-up input.
Remappable Peripheral Pin 0 input/output.
RA1/AN1/C2INA/V
BG/CTDIN/
RP1
RA1
AN1
C2INA
V
BG
CTDIN
RP1
328
I/O
O
I
O
I
I/O
TTL/DIG
Analog
Analog
Analog
ST
ST/DIG
Digital I/O.
Analog Input 1.
Comparator 2 Input A.
Band Gap Reference Voltage (V
BG) output.
CTMU pulse delay input.
Remappable Peripheral Pin 1 input/output.
RA2/AN2/C2INB/C1IND/
C3INB/VREF-/CVREF
RA2
AN2
C2INB
C1IND
C3INB
V
REF-
CV
REF
41
I/O
I
I
I
I
O
I
TTL/DIG
Analog
Analog
Analog
Analog
Analog
Analog
Digital I/O.
Analog Input 2.
Comparator 2 Input B.
Comparator 1 Input D.
Comparator 3 Input B.
A/D reference voltage (low) input.
Comparator reference voltage output.
RA3/AN3/C1INB/V
REF+
RA3
AN3
C1INB
V
REF+
52
I/O
I
I
I
TTL/DIG
Analog
Analog
Analog
Digital I/O.
Analog Input 3.
Comparator 1 Input B.
A/D reference voltage (high) input.
RA5/AN4/C1INC/SS1
/
HLVDIN/RP2
RA5
AN4
C1INC
SS1
HLVDIN
RP2
74
I/O
I
I
I
I
I/O
TTL/DIG
Analog
Analog
TTL
Analog
ST/DIG
Digital I/O.
Analog Input 4.
Comparator 1 Input C.
SPI slave select input.
High/Low-Voltage Detect input.
Remappable Peripheral Pin 2 input/output.
RA6
(1)
RA7
(1)
See the OSC2/CLKO/RA6 pin.
See the OSC1/CLKI/RA7 pin.
TABLE 1-3: PIC18F2XJ13 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
28-SPDIP/
SSOP/
SOIC
28-QFN
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
DIG = Digital output I
2
C™ = Open-Drain, I
2
C specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
2: 5.5V tolerant.