Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 139
PIC18F47J13 FAMILY
10.0 I/O PORTS
Depending on the device selected and features
enabled, there are up to five ports available. Some pins
of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
device)
• LAT register (Data Latch)
The Data Latch (LAT register) is useful for read-modify-
write operations on the value that the I/O pins are
driving.
Figure 10-1 displays a simplified model of a generic I/O
port, without the interfaces to other peripherals.
FIGURE 10-1: GENERIC I/O PORT
OPERATION
10.1 I/O Port Pin Capabilities
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than V
DD input levels.
10.1.1 PIN OUTPUT DRIVE
The output pin drive strengths vary for groups of pins
intended to meet the needs for a variety of applications.
PORTB and PORTC are designed to drive higher
loads, such as LEDs. All other ports are designed for
small loads, typically indication only. Table 10-1 sum-
marizes the output capabilities. Refer to Section 30.0
“Electrical Characteristics” for more details.
TABLE 10-1: OUTPUT DRIVE LEVELS
10.1.2 INPUT PINS AND VOLTAGE
CONSIDERATIONS
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages up
to 5.5V; a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind
can only tolerate voltages up to V
DD. Voltage excur-
sions beyond V
DD on these pins should be avoided.
Table 10-2 summarizes the input capabilities. Refer to
Section 30.0 “Electrical Characteristics” for more
details.
TABLE 10-2: INPUT VOLTAGE LEVELS
Data
Bus
WR LAT
WR TRIS
RD PORT
Data Latch
TRIS Latch
RD TRIS
Input
Buffer
I/O Pin
(1)
QD
CK
QD
CK
EN
QD
EN
RD LAT
or PORT
Note 1: I/O pins have diode protection to VDD and
V
SS.
Port Drive Description
PORTA
Minimum Intended for indication.PORTD
PORTE
PORTB
High
Suitable for direct LED drive
levels.
PORTC
Port or Pin
Tolerated
Input
Description
PORTA<7:0>
V
DD
Only VDD input levels
are tolerated.
PORTB<3:0>
PORTC<2:0>
PORTE<2:0>
PORTB<7:4>
5.5V
Tolerates input levels
above V
DD, useful for
most standard logic.
PORTC<7:3>
PORTD<7:0>