Datasheet

PIC18F66K80 FAMILY
DS39977F-page 88 2010-2012 Microchip Technology Inc.
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
TOSU PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---0 0000 ---0 0000 ---0 uuuu
(3)
TOSH PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 uuuu uuuu
(3)
TOSL PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 uuuu uuuu
(3)
STKPTR PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 00-0 0000 uu-0 0000 uu-u uuuu
(3)
PCLATU PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---0 0000 ---0 0000 ---u uuuu
PCLATH PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 uuuu uuuu
PCL PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 PC + 2
(2)
TBLPTRU PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 0000 --00 0000 --uu uuuu
TBLPTRH PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 uuuu uuuu
TBLPTRL PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 uuuu uuuu
TABLAT PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000 0000 0000 uuuu uuuu
PRODH PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx uuuu uuuu uuuu uuuu
PRODL PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx uuuu uuuu uuuu uuuu
INTCON PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 000x 0000 000u uuuu uuuu
(1)
INTCON2 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1111 1111 1111 -1-1 uuuu -u-u
(1)
INTCON3 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1100 0000 11x0 0x00 uuuu uuuu
(1)
INDF0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
POSTINC0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
POSTDEC0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
PREINC0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
PLUSW0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
FSR0H PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---- xxxx ---- uuuu ---- uuuu
FSR0L PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx uuuu uuuu uuuu uuuu
WREG PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx uuuu uuuu uuuu uuuu
INDF1 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
POSTINC1 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
POSTDEC1 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
PREINC1 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
PLUSW1 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
FSR1H PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---- xxxx ---- uuuu ---- uuuu
FSR1L PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx uuuu uuuu uuuu uuuu
BSR PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---- 0000 ---- 0000 ---- uuuu
INDF2 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 N/A N/A N/A
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
4: See Table 5-3 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.