Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 75

PIC18F66K80 FAMILY

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

CCP5MD CCP4MD CCP3MD CCP2MD CCP1MD UART2MD UART1MD SSPMD

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 CCP5MD: CCP5 Module Disable bit

1 = The CCP5 module is disabled; all CCP5 registers are held in Reset and are not writable

0 = The CCP5 module is enabled

bit 6 CCP4MD: CCP4 Module Disable bit

1 = The CCP4 module is disabled; all CCP4 registers are held in Reset and are not writable

0 = The CCP4 module is enabled

bit 5 CCP3MD: CCP3 Module Disable bit

1 = The CCP3 module is disabled; all CCP3 registers are held in Reset and are not writable

0 = The CCP3 module is enabled

bit 4 CCP2MD: CCP2 Module Disable bit

1 = The CCP2 module is disabled; all CCP2 registers are held in Reset and are not writable

0 = The CCP2 module is enabled

bit 3 CCP1MD: ECCP1 Module Disable bit

1 = The ECCP1 module is disabled; all ECCP1 registers are held in Reset and are not writable

0 = The ECCP1 module is enabled

bit 2 UART2MD: EUSART2 Module Disable bit

1 = The USART2 module is disabled; all USART2 registers are held in Reset and are not writable

0 = The USART2 module is enabled

bit 1 UART1MD: EUSART1 Module Disable bit

1 = The USART1 module is disabled; all USART1 registers are held in Reset and are not writable

0 = The USART1 module is enabled

bit 0 SSPMD: MSSP Module Disable bit

1 = The MSSP module is disabled; all SSP registers are held in Reset and are not writable

0 = The MSSP module is enabled