Datasheet

PIC18F66K80 FAMILY
DS39977F-page 52  2010-2012 Microchip Technology Inc.
FIGURE 3-1: PIC18F66K80 FAMILY CLOCK DIAGRAM
TABLE 3-1: HS, EC, XT, LP AND RC MODES: RANGES AND SETTINGS
Mode Frequency Range FOSC<3:0> Setting
EC1 (low power)
DC-160 kHz
1101
(EC1 & EC1IO) 1100
EC2 (medium power)
160kHz-16MHz
1011
(EC2 & EC2IO) 1010
EC3 (high power)
16 MHz-64 MHz
0101
(EC3 & EC3IO) 0100
HS1 (medium power) 4 MHz-16 MHz 0011
HS2 (high power) 16 MHz-25 MHz 0010
XT 100 kHz-4 MHz 0001
LP 31.25 kHz 0000
RC (External) 0-4 MHz 001x
INTIO
32 kHz-16 MHz
100x
(and OSCCON, OSCCON2)
OSC2
OSC1
SOSCO
SOSCI
HF-INTOSC
16 MHz to
31 kHz
MF-INTOSC
500 kHz to
31 kHz
LF-INTOSC
31 kHz
Postscaler
Postscaler
16 MHz
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
250 kHz
31 kHz
500 kHz
250 kHz
31 kHz
31 kHz
16 MHz
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
250 kHz
31 kHz
4x PLL
FOSC<3:0>
INTSRC
MUX
MUX
MUX
MUX
MFIOSEL
MUX
Peripherals
CPU
IDLEN
Clock Control
FOSC<3:0>
SCS<1:0>
111
110
101
100
011
010
001
000
IRCF<2:0>
MUX
PLLEN
and PLLCFG