Datasheet
PIC18F66K80 FAMILY
DS39977F-page 480 2010-2012 Microchip Technology Inc.
TABLE 28-4: SUMMARY OF CODE PROTECTION REGISTERS
28.6.1 PROGRAM MEMORY
CODE PROTECTION
The program memory may be read to, or written from,
any location using the table read and table write
instructions. The Device ID may be read with table
reads. The Configuration registers may be read and
written with the table read and table write instructions.
In normal execution mode, the CPx bits have no direct
effect. CPx bits inhibit external reads and writes. A block
of user memory may be protected from table writes if the
WRTx Configuration bit is ‘
0’.
The EBTRx bits control table reads. For a block of
user memory with the EBTRx bit set to ‘
0’, a table
read instruction that executes from within that block
is allowed to read. A table read instruction that exe-
cutes from a location outside of that block is not
allowed to read and will result in reading ‘
0’s.
Figure 28-7 throughFigure 28-9 illustrate table write
and table read protection.
FIGURE 28-7: TABLE WRITE (WRTx) DISALLOWED
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
300008h CONFIG5L — — — — CP3 CP2 CP1 CP0
300009h CONFIG5H CPD CPB
— — — — — —
30000Ah CONFIG6L
— — — — WRT3 WRT2 WRT1 WRT0
30000Bh CONFIG6H WRTD WRTB WRTC
— — — — —
30000Ch CONFIG7L
— — — — EBTR3 EBTR2 EBTR1 EBTR0
30000Dh CONFIG7H
— EBTRB — — — — — —
Legend: Shaded cells are unimplemented.
Note: Code protection bits may only be written
to a ‘
0’ from a ‘1’ state. It is not possible to
write a ‘
1’ to a bit in the ‘0’ state. Code
protection bits are only set to ‘
1’ by a full
chip erase or block erase function. The full
chip erase and block erase functions can
only be initiated via ICSP or an external
programmer. Refer to the device
programming specification for more
information.
000000h
0007FFh
000800h
003FFFh
004000h
007FFFh
008000h
00BFFFh
00C000h
00FFFFh
WRTB, EBTRB = 11
WRT0, EBTR0 = 01
WRT1, EBTR1 = 11
WRT2, EBTR2 = 11
WRT3, EBTR3 = 11
TBLWT*
TBLPTR = 0008FFh
PC = 003FFEh
TBLWT*
PC = 00BFFEh
Register Values Program Memory
Configuration Bit Settings
Results:
All table writes are disabled to Blockn whenever WRTx = 0.