Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 479
PIC18F66K80 FAMILY
28.6 Program Verification and
Code Protection
The user program memory is divided into four blocks.
One of these is a boot block of 1 or 2 Kbytes. The
remainder of the memory is divided into blocks on
binary boundaries.
Each of the blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPx)
• Write-Protect bit (WRTx)
• External Block Table Read bit (EBTRx)
Figure 28-6 shows the program memory organization for
48, 64, 96 and 128 Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 28-4.
FIGURE 28-6: CODE-PROTECTED PROGRAM MEMORY FOR THE PIC18F66K80 FAMILY
000000h
200000h
3FFFFFh
01FFFFh
Note 1: Sizes of memory areas are not to scale.
2: Boot block size is determined by the BBSIZ0 bit (CONFIG4L<4>).
Code Memory
Unimplemented
Read as ‘
0’
Configuration
and ID
Space
Device/Memory Size
(1)
Address
PIC18FX6K80 PIC18FX5K80
BBSIZ = 1 BBSIZ = 0 BBSIZ = 1 BBSIZ = 0
Boot Block
2kW
Boot Block Boot Block
2kW
Boot Block 0000h
Block 0
7kW
Block 0
3kW
0800h
Block 0
6kW
Block 0
2kW
1000h
1FFFh
Block 1
4kW
Block 1
4kW
2000h
3FFFh
Block 1
8kW
Block 1
8kW
Block 2
4kW
Block 2
4kW
4000h
5FFFh
Block 3
4kW
Block 3
4kW
6000h
7FFFh
Block 2
8kW
Block 2
8kW
8000h
BFFFh
Block 3
8kW
Block 3
8kW
C000h
FFFFh
10000h
13FFFh
14000h
17FFFh
18000h
1BFFFh
1C000h
1FFFFh