Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 475
PIC18F66K80 FAMILY
28.3.3 OPERATION OF REGULATOR IN
SLEEP
The difference in the two regulators’ operation arises
with Sleep mode. The ultra low-power regulator gives
the device the lowest current in the Regulator Enabled
mode.
The on-chip regulator can go into a lower power mode
when the device goes to Sleep by setting the REGSLP
bit (WDTCON<7>). This puts the regulator in a standby
mode so that the device consumes much less current.
The on-chip regulator can also go into the Ultra Low-
Power mode, which consumes the lowest current
possible with the regulator enabled. This mode is
controlled by the RETEN
bit (CONFIG1L<0>) and
SRETEN bit (WDTCON<4>).
The various modes of regulator operation are shown in
Table 28-3.
When the ultra low-power regulator is in Sleep mode,
the internal reference voltages in the chip will be shut
off and any interrupts referring to the internal reference
will not wake up the device. If the BOR or LVD is
enabled, the regulator will keep the internal references
on and the lowest possible current will not be achieved.
When using the ultra low-power regulator in Sleep
mode, the device will take about 250
s to start
executing code after it wakes up.
TABLE 28-3: SLEEP MODE REGULATOR SETTINGS
(1)
Device Power Mode
REGSLP
WDTCON<7>
SRETEN
WDTCON<4>
R
ETEN
CONFIG1L<0>
PIC18FXXK80 Normal Operation (Sleep) 0x1
PIC18FXXK80 Low-Power mode (Sleep) 1x1
PIC18FXXK80 Normal Operation (Sleep) 000
PIC18FXXK80 Low-Power mode (Sleep) 100
PIC18FXXK80 Ultra Low-Power mode (Sleep) x10
PIC18LFXXK80 Reserved
(2)
x Don’t Care 0
PIC18LFXXK80 Regulator Bypass mode (Sleep)
(2)
xx1
Note 1: x — Indicates that VIT status is invalid.
2: The ultra low-power regulator should be disabled (RETEN = 1, ULP disabled) on PIC18LFXXK80 devices
to obtain the lowest possible Sleep current.