Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 469
PIC18F66K80 FAMILY
REGISTER 28-11: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)
U-0 U-0 U-0 U-0 R/C-1 R/C-1 R/C-1 R/C-1
— — — — EBTR3 EBTR2 EBTR1 EBTR0
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4
Unimplemented: Read as ‘0’
bit 3
EBTR3: Table Read Protection bit
1 = Block 3 is not protected from table reads executed in other blocks
(1)
0 = Block 3 is protected from table reads executed in other blocks
(1)
bit 2 EBTR2: Table Read Protection bit
1 = Block 2 is not protected from table reads executed in other blocks
(1)
0 = Block 2 is protected from table reads executed in other blocks
(1)
bit 1 EBTR1: Table Read Protection bit
1 = Block 1 is not protected from table reads executed in other blocks
(1)
0 = Block 1 is protected from table reads executed in other blocks
(1)
bit 0 EBTR0: Table Read Protection bit
1 = Block 0 is not protected from table reads executed in other blocks
(1)
0 = Block 0 is protected from table reads executed in other blocks
(1)
Note 1: For the memory size of the blocks, see Figure 28-6.