Datasheet
PIC18F66K80 FAMILY
DS39977F-page 466 2010-2012 Microchip Technology Inc.
REGISTER 28-8: CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
R/C-1 R/C-1 U-0 U-0 U-0 U-0 U-0 U-0
CPD CPB
— — — — — —
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
bit 6
CPB: Boot Block Code Protection bit
1 = Boot block is not code-protected
(1)
0 = Boot block is code-protected
(1)
bit 5-0 Unimplemented: Read as ‘0’
Note 1: For the memory size of the blocks, see Figure 28-6. The boot block size changes with BBSIZ0.