Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 465
PIC18F66K80 FAMILY
REGISTER 28-7: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
U-0 U-0 U-0 U-0 R/C-1 R/C-1 R/C-1 R/C-1
— — — — CP3 CP2 CP1 CP0
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4
Unimplemented: Read as ‘0’
bit 3
CP3: Code Protection bit
1 = Block 3 is not code-protected
(1)
0 = Block 3 is code-protected
(1)
bit 2 CP2: Code Protection bit
1 = Block 2 is not code-protected
(1)
0 = Block 2 is code-protected
(1)
bit 1
CP1: Code Protection bit
1 = Block 1 is not code-protected
(1)
0 = Block 1 is code-protected
(1)
bit 0
CP0: Code Protection bit
1 = Block 0 is not code-protected
(1)
0 = Block 0, is code-protected
(1)
Note 1: For the memory size of the blocks, see Figure 28-6.