Datasheet

PIC18F66K80 FAMILY
DS39977F-page 436  2010-2012 Microchip Technology Inc.
REGISTER 27-58: IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
Mode 0
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
IRXIP WAKIP ERRIP TXB2IP TXB1IP
(1)
TXB0IP
(1)
RXB1IP RXB0IP
Mode 1,2
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
IRXIP WAKIP ERRIP TXBnIP TXB1IP
(1)
TXB0IP
(1)
RXBnIP FIFOWMIP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
IRXIP: CAN Bus Error Message Received Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
WAKIP: CAN Bus Activity Wake-up Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
ERRIP: CAN Module Error Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4 When CAN is in Mode 0:
TXB2IP: CAN Transmit Buffer 2 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 1 or 2:
TXBnIP: CAN Transmit Buffer Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
TXB1IP: CAN Transmit Buffer 1 Interrupt Priority bit
(1)
1 = High priority
0 = Low priority
bit 2
TXB0IP: CAN Transmit Buffer 0 Interrupt Priority bit
(1)
1 = High priority
0 = Low priority
bit 1 When CAN is in Mode 0:
RXB1IP: CAN Receive Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 1 or 2:
RXBnIP: CAN Receive Buffer Interrupts Priority bit
1 = High priority
0 = Low priority
bit 0 When CAN is in Mode 0:
RXB0IP: CAN Receive Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
When CAN is in Mode 1:
Unimplemented: Read as ‘0’
When CAN is in Mode 2:
FIFOWMIP: FIFO Watermark Interrupt Priority bit
1 = High priority
0 = Low priority
Note 1: In CAN Mode 1 and 2, these bits are forced to ‘0’.