Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 433

PIC18F66K80 FAMILY

27.2.5 CAN MODULE I/O CONTROL

This register controls the operation of the CAN module’s

I/O pins in relation to the rest of the microcontroller.

R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0

TX2SRC TX2EN ENDRHI

(1)

CANCAP — — — CLKSEL

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7

TX2SRC: CANTX2 Pin Data Source bit

1 = CANTX2 pin will output the CAN clock

0 = CANTX2 pin will output CANTX

bit 6 TX2EN: CANTX Pin Enable bit

1 = CANTX2 pin will output CANTX or CAN clock as selected by the TX2SRC bit

0 = CANTX2 pin will have digital I/O function

bit 5

ENDRHI: Enable Drive High bit

(1)

1 = CANTX pin will drive VDD when recessive

0 = CANTX pin will be tri-state when recessive

bit 4

CANCAP: CAN Message Receive Capture Enable bit

1 = Enable CAN capture; CAN message receive signal replaces input on RC2/CCP1

0 = Disable CAN capture; RC2/CCP1 input to CCP1 module

bit 3-1

Unimplemented: Read as ‘0’

bit 0

CLKSEL: CAN Clock Source Selection bit

1 = Use the oscillator as the source of the CAN system clock

0 = Use the PLL as the source of the CAN system clock

Note 1: Always set this bit when using a differential bus to avoid signal crosstalk in CANTX from other nearby pins.