Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 409
PIC18F66K80 FAMILY
bit 2-0 Mode 0:
FILHIT<2:0>: Filter Hit bits
These bits indicate which acceptance filter enabled the last message reception into Receive Buffer 1.
111 = Reserved
110 = Reserved
101 = Acceptance Filter 5 (RXF5)
100 = Acceptance Filter 4 (RXF4)
011 = Acceptance Filter 3 (RXF3)
010 = Acceptance Filter 2 (RXF2)
001 = Acceptance Filter 1 (RXF1), only possible when RXB0DBEN bit is set
000 = Acceptance Filter 0 (RXF0), only possible when RXB0DBEN bit is set
Mode 1, 2:
FILHIT<4:0>: Filter Hit bits<2:0>
These bits, in combination with FILHIT<4:3>, indicate which acceptance filter enabled the message
reception into this receive buffer.
01111 = Acceptance Filter 15 (RXF15)
01110 = Acceptance Filter 14 (RXF14)
...
00000 = Acceptance Filter 0 (RXF0)
REGISTER 27-14: RXB1CON: RECEIVE BUFFER 1 CONTROL REGISTER (CONTINUED)
Note 1: This bit is set by the CAN module upon receiving a message and must be cleared by software after the buffer
is read. As long as RXFUL is set, no new message will be loaded and the buffer will be considered full.
REGISTER 27-15: RXBnSIDH: RECEIVE BUFFER ‘n’ STANDARD IDENTIFIER REGISTERS,
HIGH BYTE [0  n  1]
R-x R-x R-x R-x R-x R-x R-x R-x
SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0
SID<10:3>: Standard Identifier bits (if EXID (RXBnSIDL<3>) = 0)
Extended Identifier bits, EID<28:21> (if EXID =
1).