Datasheet
PIC18F66K80 FAMILY
DS39977F-page 408 2010-2012 Microchip Technology Inc.
REGISTER 27-14: RXB1CON: RECEIVE BUFFER 1 CONTROL REGISTER
Mode 0
R/C-0 R/W-0 R/W-0 U-0 R-0 R/W-0 R-0 R-0
RXFUL
(1)
RXM1 RXM0 — RXRTRRO FILHIT2 FILHIT1 FILHIT0
Mode 1,2
R/C-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0
RXFUL
(1)
RXM1 RTRRO FILHIT4 FILHIT3 FILHIT2 FILHIT1 FILHIT0
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
RXFUL: Receive Full Status bit
(1)
1 = Receive buffer contains a received message
0 = Receive buffer is open to receive a new message
bit 6-5, 6
Mode 0:
RXM<1:0>: Receive Buffer Mode bit 1 (combines with RXM0 to form RXM<1:0> bits, see bit 5)
11 = Receive all messages (including those with errors); filter criteria is ignored
10 = Receive only valid messages with extended identifier; EXIDEN in RXFnSIDL must be ‘1’
01 = Receive only valid messages with standard identifier, EXIDEN in RXFnSIDL must be ‘0’
00 = Receive all valid messages as per EXIDEN bit in RXFnSIDL register
Mode 1, 2:
RXM1: Receive Buffer Mode bit
1 = Receive all messages (including those with errors); acceptance filters are ignored
0 = Receive all valid messages as per acceptance filters
bit 5 Mode 0:
RXM<1:0>: Receive Buffer Mode bit 0 (combines with RXM1 to form RXM<1:0> bits, see bit 6)
Mode 1, 2:
RTRRO: Remote Transmission Request bit for Received Message (read-only)
1 = A remote transmission request is received
0 = A remote transmission request is not received
bit 4 Mode 0
:
FILHIT24: Filter Hit bit 4
M
ode 1, 2:
FILHIT<4:0>: Filter Hit bit 4
This bit combines with other bits to form the filter acceptance bits<4:0>.
bit 3 Mode 0:
RXRTRRO: Remote Transmission Request bit for Received Message (read-only)
1 = A remote transmission request is received
0 = A remote transmission request is not received
Mode 1, 2:
FILHIT<4:0>: Filter Hit bit 3
This bit combines with other bits to form the filter acceptance bits<4:0>.
Note 1: This bit is set by the CAN module upon receiving a message and must be cleared by software after the buffer
is read. As long as RXFUL is set, no new message will be loaded and the buffer will be considered full.