Datasheet

PIC18F66K80 FAMILY
DS39977F-page 374  2010-2012 Microchip Technology Inc.
REGISTER 24-1: CMxCON: COMPARATOR CONTROL x REGISTER
R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
CON COE CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
bit 6
COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
bit 5
CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
bit 4-3
EVPOL<1:0>: Interrupt Polarity Select bits
11 = Interrupt generation on any change of the output
(1)
10 = Interrupt generation only on high-to-low transition of the output
01 = Interrupt generation only on low-to-high transition of the output
00 = Interrupt generation is disabled
bit 2
CREF: Comparator Reference Select bit (non-inverting input)
1 = Non-inverting input connects to internal CVREF voltage
0 = Non-inverting input connects to CxINA pin
bit 1-0
CCH<1:0>: Comparator Channel Select bits
11 = Inverting input of comparator connects to VBG
10 = Inverting input of comparator connects to C2INB pin
(2)
01 = Inverting input of comparator connects to CxINC pin
00 = Inverting input of comparator connects to C1INB pin
(2)
Note 1: The CMPxIF is automatically set any time this mode is selected and must be cleared by the application
after the initial configuration.
2: Comparator 1 uses C2INB as an input to the inverting terminal. Comparator 2 uses C1INB as an input to
the inverted terminal.