Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 371
PIC18F66K80 FAMILY
TABLE 23-2: REGISTERS ASSOCIATED WITH THE A/D MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
PIR1
PSPIF ADIF RC1IF TX1IF SSPIF TMR1GIF TMR2IF TMR1IF
PIE1
PSPIE ADIE RC1IE TX1IE SSPIE TMR1GIE TMR2IE TMR1IE
IPR1
PSPIP ADIP RC1IP TX1IP SSPIP TMR1GIP TMR2IP TMR1IP
ADRESH A/D Result Register High Byte
ADRESL A/D Result Register Low Byte
ADCON0
— CHS4 CHS3 CHS2 CHS1 CHS0 GO/DONE ADON
ADCON1 TRIGSEL1 TRIGSEL0 VCFG1 VCFG0 VNCFG CHSN2 CHSN1 CHSN0
ADCON2 ADFM
— ACQT2 ACQT1 ACQT0 ADCS2 ADCS1 ADCS0
ANCON0 ANSEL7 ANSEL6 ANSEL5 ANSEL4 ANSEL3 ANSEL2 ANSEL1 ANSEL0
ANCON1
— ANSEL14 ANSEL13 ANSEL12 ANSEL11 ANSEL10 ANSEL9 ANSEL8
PORTA
RA7
(1)
RA6
(1)
RA5 — RA3 RA2 RA1 RA0
TRISA
TRISA7
(1)
TRISA6
(1)
TRISA5 — TRISA3 TRISA2 TRISA1 TRISA0
PORTB
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
PORTE RE7 RE6 RE5 RE4 RE3
—RE1RE0
TRISE TRISE7 TRISE6 TRISE5 TRISE4
— TRISE2 TRISE1 TRISE0
PMD1 PSPMD CTMUMD
ADCMD TMR4MD TMR3MD TMR2MD TMR1MD TMR0MD
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1: These bits are available only in certain oscillator modes when the FOSC2 Configuration bit = 0. If that
Configuration bit is cleared, this signal is not implemented.