Datasheet

PIC18F66K80 FAMILY
DS39977F-page 234  2010-2012 Microchip Technology Inc.
17.2 Timer4 Interrupt
The Timer4 module has an eight-bit Period register,
PR4, that is both readable and writable. Timer4 incre-
ment from 00h until it matches PR4 and then resets to
00h on the next increment cycle. The PR4 register is
initialized to FFh upon Reset.
17.3 Output of TMR4
The outputs of TMR4 (before the postscaler) are used
only as a PWM time base for the ECCP modules. They
are not used as baud rate clocks for the MSSP module
as is the Timer2 output.
FIGURE 17-1: TIMER4 BLOCK DIAGRAM
TABLE 17-1: REGISTERS ASSOCIATED WITH TIMER4 AS A TIMER/COUNTER
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
IPR4 TMR4IP EEIP CMP2IP CMP1IP
— CCP5IP CCP4IP CCP3IP
PIR4 TMR4IF EEIF CMP2IF CMP1IF
— CCP5IF CCP4IF CCP3IF
PIE4 TMR4IE EEIE CMP2IE CMP1IE
— CCP5IE CCP4IE CCP3IE
TMR4 Timer4 Register
T4CON
— T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0
PR4 Timer4 Period Register
PMD1
PSPMD CTMUMD ADCMD TMR4MD TMR3MD TMR2MD TMR1MD TMR0MD
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer4 module.
Comparator
TMR4 Output
TMR4
Postscaler
Prescaler
PR4
2
F
OSC/4
1:1 to 1:16
1:1, 1:4, 1:16
4
T4OUTPS<3:0>
T4CKPS<1:0>
Set TMR4IF
Internal Data Bus
8
Reset
TMRx/PRx
8
8
(to PWM)
Match