Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 223
PIC18F66K80 FAMILY
16.0 TIMER3 MODULE
The Timer3 timer/counter modules incorporate these
features:
• Software selectable operation as a 16-bit timer or
counter
• Readable and writable eight-bit registers (TMR3H
and TMR3L)
• Selectable clock source (internal or external) with
device clock or SOSC oscillator internal options
• Interrupt-on-overflow
• Module Reset on ECCP Special Event Trigger
A simplified block diagram of the Timer3 module is
shown in Figure 16-1.
The Timer3 module is controlled through the T3CON
register (Register 16-1). It also selects the clock source
options for the ECCP modules. (For more information,
see
Section 20.1.1 “ECCP Module and Timer
Resources”
.)
The F
OSC clock source should not be used with the
ECCP capture/compare features. If the timer will be
used with the capture or compare features, always
select one of the other timer clocking options.
REGISTER 16-1: T3CON: TIMER3 CONTROL REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TMR3CS1 TMR3CS0 T3CKPS1 T3CKPS0 SOSCEN T3SYNC
RD16 TMR3ON
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6
TMR3CS<1:0>: Timer3 Clock Source Select bits
10 = Timer3 clock source is either from pin or oscillator, depending on the SOSCEN bit:
SOSCEN =
0:
External clock is from T3CKI pin (on the rising edge).
SOSCEN =
1:
Depending on the SOSCSELx Configuration bit, the clock source is either a crystal oscillator on
SOSCI/SOSCO or an internal digital clock from the SCLKI pin.
01 = Timerx clock source is system clock (FOSC)
(1)
00 = Timerx clock source is instruction clock (FOSC/4)
bit 5-4
T3CKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
bit 3 SOSCEN: SOSC Oscillator Enable bit
1 = SOSC is enabled and available for Timer3
0 = SOSC is disabled and available for Timer3
bit 2
T3SYNC: Timer3 External Clock Input Synchronization Control bit
(Not usable if the device clock comes from Timer1/Timer3.)
When TMR
3CS<1:0> = 10:
1 = Does not synchronize external clock input
0 = Synchronizes external clock input
When TMR3CS<1:0> = 0x:
This bit is ignored; Timer3 uses the internal clock.
bit 1 RD16: 16-Bit Read/Write Mode Enable bit
1 = Enables register read/write of Timer3 in one 16-bit operation
0 = Enables register read/write of Timer3 in two eight-bit operations
bit 0
TMR3ON: Timer3 On bit
1 = Enables Timer3
0 = Stops Timer3
Note 1: The FOSC clock source should not be selected if the timer will be used with the ECCP capture/compare features.