Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 189
PIC18F66K80 FAMILY
11.7 PORTF, LATF and TRISF Registers
PORTF is an 8-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch regis-
ters are TRISF and LATF. All pins on PORTF are
implemented with Schmitt Trigger input buffers. Each pin
is individually configurable as an input or output.
Each of the PORTF pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
done by clearing bit, RFPU (PADCFG1<5>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on
any device Reset.
EXAMPLE 11-6: INITIALIZING PORTF
TABLE 11-12: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF
Note: PORTF is only available on 64-pin devices.
Note: On device Resets, pins, RF<7:1>, are
configured as analog inputs and are read
as ‘
0’.
CLRF PORTF ; Initialize PORTF by
; clearing output
; data latches
CLRF LATF ; Alternate method
; to clear output
; data latches
MOVLW 0CEh ; Value used to
; initialize data
; direction
MOVWF TRISF ; Set RF3:RF1 as inputs
; RF5:RF4 as outputs
; RF7:RF6 as inputs
TABLE 11-11: PORTF FUNCTIONS
Pin Name Function
TRIS
Setting
I/O I/O Type Description
RF0/MDMIN RF0 0 O DIG LATF<0> data output.
1 I ST PORTF<0> data input.
MDMIN 1 I ST Modulator source input.
RF1 RF1 0 O DIG LATF<1> data output.
1 I ST PORTF<1> data input.
RF2/MDCIN1 RF2 0 O DIG LATF<2> data output.
1 I ST PORTF<2> data input.
MDCIN1 1 I ST Modulator Carrier Input 1.
RF3 RF3 0 O DIG LATF<3> data output.
1 I ST PORTF<3> data input.
RF4/MDCIN2 RF4 0 O DIG LATF<4> data output.
1 I ST PORTF<4> data input.
MDCIN2 1 I ST Modulator Carrier Input 2.
RF5 RF5 0 O DIG LATF<5> data output.
1 I ST PORTF<5> data input.
RF6/MDOUT RF6 0 O DIG LATF<6> data output.
1 I ST PORTF<6> data input.
MDOUT 0 O DIG Modulator output.
RF7 RF7 0 O DIG LATF<7> data output.
1 I ST PORTF<7> data input.
Legend: O = Output; I = Input; ANA = Analog Signal; DIG = CMOS Output; ST = Schmitt Trigger Buffer Input;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PORTF RF7 RF6 RF5 RF4 RF3 RF2 RF1 RF0
LATF LATF7 LATF6 LATF5 LATF4 LATF3 LATF2 LATF1 LATF0
TRISF TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0
PADCFG1
RDPU REPU RFPU
(1)
RGPU
(1)
— — — CTMUDS
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTF.
Note 1: These bits are unimplemented on 28-pin devices, read as ‘0’.