Datasheet

PIC18F66K80 FAMILY
DS39977F-page 160  2010-2012 Microchip Technology Inc.
REGISTER 10-12: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4
R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0
TMR4IE EEIE CMP2IE CMP1IE
— CCP5IE CCP4IE CCP3IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
TMR4IE: TMR4 Overflow Interrupt Flag bit
1 = Interrupt is enabled
0 = Interrupt is disabled
bit 6
EEIE: Data EEDATA/Flash Write Operation Interrupt Flag bit
1 = Interrupt is enabled
0 = Interrupt is disabled
bit 5
CMP2IE: CMP2 Interrupt Flag bit
1 = Interrupt is enabled
0 = Interrupt is disabled
bit 4
CMP1IE: CMP1 Interrupt Flag bit
1 = Interrupt is enabled
0 = Interrupt is disabled
bit 3
Unimplemented: Read as ‘0’
bit 2
CCP5IE: CCP5 Interrupt Flag bit
1 = Interrupt is enabled
0 = Interrupt is disabled
bit 1
CCP4IE: CCP4 Interrupt Flag bit
1 = Interrupt is enabled
0 = Interrupt is disabled
bit 0
CCP3IE: CCP3 Interrupt Flag bits
1 = Interrupt is enabled
0 = Interrupt is disabled