Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 159
PIC18F66K80 FAMILY
REGISTER 10-11: PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
U-0 U-0 R-0 R-0 R/W-0 R/W-0 R/W-0 U-0
— — RC2IE TX2IE CTMUIE CCP2IE CCP1IE —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘0’
bit 5
RC2IE: EUSARTx Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 4
TX2IE: EUSARTx Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 3
CTMUIE: CTMU Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2
CCP2IE: CCP2 Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1
CCP1IE: ECCP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 0
Unimplemented: Read as ‘0’