Datasheet
PIC18F66K80 FAMILY
DS39977F-page 158 2010-2012 Microchip Technology Inc.
REGISTER 10-10: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
OSCFIE
— — — BCLIE HLVDIE TMR3IE TMR3GIE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
OSCFIE: Oscillator Fail Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 6-4
Unimplemented: Read as ‘0’
bit 3
BCLIE: Bus Collision Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2
HLVDIE: High/Low-Voltage Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 0
TMR3GIE: Timer3 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled