Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 113
PIC18F66K80 FAMILY
TABLE 6-2: PIC18F66K80 FAMILY REGISTER FILE SUMMARY
Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
on page
FFFh TOSU
— — — Top-of-Stack Upper Byte (TOS<20:16>) 88
FFEh TOSH Top-of-Stack High Byte (TOS<15:8>) 88
FFDh TOSL Top-of-Stack Low Byte (TOS<7:0>) 88
FFCh STKPTR STKFUL STKUNF
— SP4 SP3 SP2 SP1 SP0 88
FFBh PCLATU
— — Bit 21 Holding Register for PC<20:16> 88
FFAh PCLATH Holding Register for PC<15:8> 88
FF9h PCL PC Low Byte (PC<7:0>) 88
FF8h TBLPTRU
— — Bit 21 Program Memory Table Pointer Upper Byte (TBLPTR<20:16>) 88
FF7h TBLPTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>) 88
FF6h TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>) 88
FF5h TABLAT Program Memory Table Latch 88
FF4h PRODH Product Register High Byte 88
FF3h PRODL Product Register Low Byte 88
FF2h INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 88
FF1h INTCON2 RBPU
INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP INT3IP RBIP 88
FF0h INTCON3 INT2IP INT1IP INT3IE INT2IE INT1IE INT3IF INT2IF INT1IF 88
FEFh INDF0 Uses contents of FSR0 to address data memory – value of FSR0 not changed (not a physical register) 88
FEEh POSTINC0 Uses contents of FSR0 to address data memory – value of FSR0 post-incremented (not a physical register) 88
FEDh POSTDEC0 Uses contents of FSR0 to address data memory – value of FSR0 post-decremented (not a physical register) 88
FECh PREINC0 Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) 88
FEBh PLUSW0 Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) –
value of FSR0 offset by W
88
FEAh FSR0H
— — — — Indirect Data Memory Address Pointer 0 High Byte 88
FE9h FSR0L Indirect Data Memory Address Pointer 0 Low Byte 88
FE8h WREG Working Register 88
FE7h INDF1 Uses contents of FSR1 to address data memory – value of FSR1 not changed (not a physical register) 88
FE6h POSTINC1 Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register) 88
FE5h POSTDEC1 Uses contents of FSR1 to address data memory – value of FSR1 post-decremented (not a physical register) 88
FE4h PREINC1 Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) 88
FE3h PLUSW1 Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) –
value of FSR1 offset by W
88
FE2h FSR1H
— — — — Indirect Data Memory Address Pointer 1 High Byte 88
FE1h FSR1L Indirect Data Memory Address Pointer 1 Low Byte 88
FE0h BSR
— — — — Bank Select Register 88
FDFh INDF2 Uses contents of FSR2 to address data memory – value of FSR2 not changed (not a physical register) 88
FDEh POSTINC2 Uses contents of FSR2 to address data memory – value of FSR2 post-incremented (not a physical register) 89
FDDh POSTDEC2 Uses contents of FSR2 to address data memory – value of FSR2 post-decremented (not a physical register) 89
FDCh PREINC2 Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) 89
FDBh PLUSW2 Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) –
value of FSR2 offset by W
89
FDAh FSR2H
— — — — Indirect Data Memory Address Pointer 2 High Byte 89
FD9h FSR2L Indirect Data Memory Address Pointer 2 Low Byte 89
FD8h STATUS
— — —NOVZDCC89
FD7h TMR0H Timer0 Register High Byte 89
FD6h TMR0L Timer0 Register Low Byte 89
FD5h T0CON TMR0ON T08BIT T0CS T0SE PSA T0PS2 T0PS1 T0PS0 89
FD4h
Unimplemented —
FD3h OSCCON IDLEN IRCF2 IRCF1 IRCF0 OSTS HFIOFS SCS1 SCS0 89
FD2h OSCCON2
— SOSCRUN — SOSCDRV SOSCGO — MFIOFS MFIOSEL 89
FD1h WDTCON REGSLP
—ULPLVLSRETEN— ULPEN ULPSINK SWDTEN 89
FD0h RCON IPEN SBOREN CM
RI TO PD POR BOR 89