Datasheet

 2010-2012 Microchip Technology Inc. DS39977F-page 101
PIC18F66K80 FAMILY
6.0 MEMORY ORGANIZATION
PIC18F66K80 family devices have these types of
memory:
• Program Memory
• Data RAM
• Data EEPROM
As Harvard architecture devices, the data and program
memories use separate busses. This enables
concurrent access of the two memory spaces.
The data EEPROM, for practical purposes, can be
regarded as a peripheral device because it is
addressed and accessed through a set of control
registers.
Additional detailed information on the operation of the
Flash program memory is provided in
Section 7.0
“Flash Program Memory”
. The data EEPROM is
discussed separately in
Section 8.0 “Data EEPROM
Memory”
.
FIGURE 6-1: MEMORY MAPS FOR PIC18F66K80 FAMILY DEVICES
Note: Sizes of memory areas are not to scale. Sizes of program memory areas are enhanced to show detail.
Unimplemented
Read as ‘0’
000000h
1FFFFFh
00FFFFh
PC<20:0>
Stack Level 1

Stack Level 31


CALL, CALLW, RCALL,
RETURN, RETFIE, RETLW,
21
User Memory Space
On-Chip
Memory
ADDULNK, SUBULNK
Unimplemented
Read as ‘0’
On-Chip
Memory
007FFFh
PIC18FX5K80 PIC18FX6K80