Datasheet

PIC18(L)F2X/4XK22
DS41412F-page 156  2010-2012 Microchip Technology Inc.
REGISTER 10-7: ANSELE – PORTE ANALOG SELECT REGISTER
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1
— — — — — ANSE2
(1)
ANSE1
(1)
ANSE0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-3 Unimplemented: Read as ‘0’
bit 2-0 ANSE<2:0>: RE<2:0> Analog Select bit
(1)
1 = Digital input buffer disabled
0 = Digital input buffer enabled
Note 1: Available on PIC18(L)F4XK22 devices only.
REGISTER 10-8: TRISx: PORTx TRI-STATE REGISTER
(1)
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
TRISx7 TRISx6 TRISx5 TRISx4 TRISx3 TRISx2 TRISx1 TRISx0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 TRISx<7:0>: PORTx Tri-State Control bit
1 = PORTx pin configured as an input (tri-stated)
0 = PORTx pin configured as an output
Note 1: Register description for TRISA, TRISB, TRISC and TRISD.
REGISTER 10-9: TRISE: PORTE TRI-STATE REGISTER
R/W-1 U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1
WPUE3 — — — —TRISE2
(1)
TRISE1
(1)
TRISE0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 WPUE3: Weak Pull-up Register bits
1 = Pull-up enabled on PORT pin
0 = Pull-up disabled on PORT pin
bit 6-3 Unimplemented: Read as ‘0’
bit 2-0 TRISE<7:0>: PORTE Tri-State Control bit
(1)
1 = PORTE pin configured as an input (tri-stated)
0 = PORTE pin configured as an output
Note 1: Available on PIC18(L)F4XK22 devices only.