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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFN 28 (6x6) 8-Bit 64 MHz I/O number 24
361362363364365366367368369370
2010-2012 Microchip Technology Inc. DS41412F-page 361
PIC18(L)F2X/4XK22
REGISTER 24-5: CONFIG4L: CONFIGURATION REGISTER 4 LOW
R/P-1 R/P-0 U-0 U-0 U-0 R/P-1 U-0
R/P-1
DEBUG
(2)
XINST — — —LVP
(1)
—
STVREN
bit 7
bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed x = Bit is unknown
bit 7 DEBUG
: Background Debugger Enable bit
(2)
1 = Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug
bit 6 XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
bit 5-3 Unimplemented: Read as ‘0’
bit 2 LVP: Single-Supply ICSP Enable bit
1 = Single-Supply ICSP enabled
0 = Single-Supply ICSP disabled
bit 1 Unimplemented: Read as ‘0’
bit 0 STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
Note 1: Can only be changed by a programmer in high-voltage programming mode.
2: The DEBUG
bit is managed automatically by device development tools including debuggers and programmers. For
normal device operations, this bit should be maintained as a ‘1’.
REGISTER 24-6: CONFIG5L: CONFIGURATION REGISTER 5 LOW
U-0 U-0 U-0 U-0 R/C-1 R/C-1 R/C-1
R/C-1
— — — —CP3
(1)
CP2
(1)
CP1
CP0
bit 7
bit 0
Legend:
R = Readable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed C = Clearable only bit
bit 7-4 Unimplemented: Read as ‘0’
bit 3 CP3: Code Protection bit
(1)
1 = Block 3 not code-protected
0 = Block 3 code-protected
bit 2 CP2: Code Protection bit
(1)
1 = Block 2 not code-protected
0 = Block 2 code-protected
bit 1 CP1: Code Protection bit
1 = Block 1 not code-protected
0 = Block 1 code-protected
bit 0 CP0: Code Protection bit
1 = Block 0 not code-protected
0 = Block 0 code-protected
Note 1: Available on PIC18(L)FX5K22 and PIC18(L)FX6K22 devices.