Datasheet

PIC18F2XK20/4XK20
DS41303G-page 132  2010 Microchip Technology Inc.
TABLE 10-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
PORTD
(1)
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 62
LATD
(1)
PORTD Data Latch Register (Read and Write to Data Latch) 62
TRISD
(1)
PORTD Data Direction Control Register 62
TRISE
(1)
IBF OBF IBOV PSPMODE — TRISE2 TRISE1 TRISE0 62
CCP1CON P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 61
SLRCON — — — SLRE
(1)
SLRD
(1)
SLRC SLRB SLRA 63
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1: Not implemented on PIC18F2XK20 devices.