Information
2010 Microchip Technology Inc. DS41303G-page 137
PIC18F2XK20/4XK20
REGISTER 10-3: ANSELH: ANALOG SELECT REGISTER 2
U-0 U-0 U-0 R/W-1
(1)
R/W-1
(1)
R/W-1
(1)
R/W-1
(1)
R/W-1
(1)
— — — ANS12 ANS11 ANS10 ANS9 ANS8
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4 ANS12: RB0 Analog Select Control bit
1 = Digital input buffer of RB0 is disabled
0 = Digital input buffer of RB0 is enabled
bit 3 ANS11: RB4 Analog Select Control bit
1 = Digital input buffer of RB4 is disabled
0 = Digital input buffer of RB4 is enabled
bit 2 ANS10: RB1 Analog Select Control bit
1 = Digital input buffer of RB1 is disabled
0 = Digital input buffer of RB1 is enabled
bit 1 ANS9: RB3 Analog Select Control bit
1 = Digital input buffer of RB3 is disabled
0 = Digital input buffer of RB3 is enabled
bit 0 ANS8: RB2 Analog Select Control bit
1 = Digital input buffer of RB2 is disabled
0 = Digital input buffer of RB2 is enabled
Note 1: Default state is determined by the PBADEN bit of CONFIG3H. The default state is ‘0’ When
PBADEN = ‘0’.